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74LCX32652 bảng dữ liệu(PDF) 3 Page - Fairchild Semiconductor |
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74LCX32652 bảng dữ liệu(HTML) 3 Page - Fairchild Semiconductor |
3 / 11 page Preliminary 3 www.fairchildsemi.com Truth Table (Note 3) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition Note 3: Data I/O paths (1A and 1B: 0 - 7) is shown. This also applies to data I/O (1A and 1B: 8 - 15) and #2 control pins, to data (2A and 2B: 0 - 7) and #3 control pins, to data (2A and 2B: 8 - 15) and #4 control pins. Note 4: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. Inputs Inputs/Outputs (Note 4) Operating Mode OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 1A0 thru 1A7 1B0 thru 1B7 L H H or L H or L X X Input Input Isolation LH X X Store A and B Data XH H or L X X Input Not Specified Store A, Hold B HH X X Input Output Store A in Both Registers LX H or L X X Not Specified Input Hold A, Store B LL X X Output Input Store B in Both Registers L L X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus H H X X L X Input Output Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus |
Số phần tương tự - 74LCX32652 |
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Mô tả tương tự - 74LCX32652 |
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