© 1999 Fairchild Semiconductor Corporation

DS009480

www.fairchildsemi.com

April 1988

Revised July 1999

74F148

8-Line to 3-Line Priority Encoder

General Description

The F148 provides three bits of binary coded output repre-

senting the position of the highest order active input, along

with an output indicating the presence of any active input. It

is easily expanded via input and output enables to provide

priority encoding over many bits.

Features

s Encodes eight data lines in priority

s Provides 3-bit binary priority code

s Input enable capability

s Signals when data is present on any input

s Cascadable for priority encoding of n bits

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Truth Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

X

= Immaterial

Order Number

Package Number

Package Description

74F148SC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74F148SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F148PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Inputs

Outputs

EI

H

X

XXX

XXX

X

H

H

H

H

H

L

HHH

HHH

HH

H

H

HH

L

L

X

XXX

XXX

L

L

L

L

L

H

L

X

XXX

XX

L

H

L

H

L

L

H

L

X

XXX

X

L

H

H

L

L

H

L

H

L

X

XXX

L

H

H

H

L

H

H

L

H

LX

X

X

L

H

H

H

H

L

L

L

H

H

L

X

X

L

HHH

HH

L

H

L

H

H

L

X

L

H

HHH

HH

L

L

HH

H

L

L

HH

HHH

HH

L

H

HH

H