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MCP2025 bảng dữ liệu(PDF) 6 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  LIN Transceiver with Voltage Regulator
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 2012 Microchip Technology Inc.
DS22306A-page 6
MCP2025
1.3
Fail-Safe Features
1.3.1
GENERAL FAIL-SAFE FEATURES
• An internal pull-down resistor on the CS/LWAKE
pin disables the transmitter if the pin is floating.
• An internal pull-up resistor on the TXD pin places
TXD in HIGH, thus the LBUS is recessive if the
TXD pin is floating.
• High-impedance and low leakage current on
LBUS during loss of power or ground.
• The current limit on LBUS protects the transceiver
from being damaged if the pin is shorted to VBB.
1.3.2
THERMAL PROTECTION
The thermal protection circuit monitors the die
temperature and is able to shut down the LIN
transmitter and voltage regulator.
There are three causes for a thermal overload. A
thermal shut down can be triggered by any one, or a
combination of, the following thermal overload
conditions:
• Voltage regulator overload
• LIN bus output overload
• Increase in die temperature due to increase in
environment temperature
The recovery time from the thermal shutdown is equal
to adequate cooling time.
Driving the TXD and checking the RXD pin makes it
possible to determine whether there is a bus contention
(TXD = high, RXD = low) or a thermal overload condi-
tion (TXD = low, RXD = high).
FIGURE 1-2:
THERMAL SHUTDOWN
STATE DIAGRAMS
1.3.3
TXD/LBUS TIME-OUT TIMER
The LIN bus can be driven to a dominant level either
from the TXD pin or externally. An internal timer deac-
tivates the LBUS transmitter if a dominant status
(LOW) on the LIN bus lasts longer than Bus Dominant
Time-out Time tTO(LIN) (approximately 20 milliseconds);
at the same time, RXD output is put in recessive
(HIGH) and the internal pull-up resistor between LBUS
and VBB is disconnected. The timer is reset on any
recessive LBUS status or POR mode. The recessive
status on LBUS can be caused either by the bus being
externally pulled up or by the TXD pin being returned
high.
1.4
Internal Voltage Regulator
The MCP2025 has a positive regulator capable of sup-
plying +5.00 or +3.30 VDC ±3% at up to 70mA of load
current over the entire operating temperature range of
-40°C to +125°C. The regulator uses an LDO design, is
short-circuit-protected and will turn the regulator output
off if its output falls below the Shutdown Voltage
Threshold VSD.
With a load current of 70mA, the minimum input to out-
put voltage differential required for the output to remain
in regulation is typically +0.5V (+1V maximum over the
full operating temperature range). Quiescent current is
less than 100 µA with a full 70mA load current when the
input to output voltage differential is greater than
+3.00V.
Regarding the correlation between VBB, VREG and IDD,
please refer to Figure 1-6 and Figure 1-7. When the
input voltage (VBB) drops below the differential needed
to provide stable regulation, the voltage regulator
output VREG will track the input down to approximately
VOFF. The regulator will turn off the output at this point.
This will allow PIC microcontrollers, with internal POR
circuits, to generate a clean arming of the POWER-ON
RESET trip point. The MCP2025 will then monitor VBB
and turn on the regulator when VBB is above the thresh-
old of regulator turn on voltage VON.
Under specific ambient temperature and battery volt-
age range, the voltage regulator can output as high as
150 mA current. For current load capability of the volt-
age regulator, refer to Figure 1-4 and Figure 1-5.
In POWER-DOWN mode, the VBB monitor is turned off
(see Section 1.1.5 “Power-down Mode” for details).
The regulator requires an external output bypass
capacitor for stability. See FIGURE 2-1: “ESR Curves
For Load Capacitor Selection”
for correct capacity
and ESR for stable operation.
Operation
Mode
Transmitter
Shutdown
LIN bus
Voltage
Shutdown
Regulator
Output
Temp < SHUTDOWNTEMP
shorted
to VBB
Overload
Temp < SHUTDOWN
TEMP
Note:
The regulator overload current limit is
approximately 250 mA. The regulator out-
put voltage VREG is monitored. If output
voltage VREG is lower than VSD, the volt-
age regulator will turn off. After a recovery
time of about 3mS, the VREG will be
checked again. If there is no short circuit,
(VREG > VSD) then the voltage regulator
remains on.


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