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TS3005ITD1033T bảng dữ liệu(PDF) 9 Page - Touchstone Semiconductor Inc |
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TS3005ITD1033T bảng dữ liệu(HTML) 9 Page - Touchstone Semiconductor Inc |
9 / 11 page TS3005 TS3005DS r1p0 Page 9 RTFDS capacitance at either or both FOUT and PWMOUT terminals is to be ≤5p , then the value of C EXT should be ≤7.5p . TS3005 Start-up Time As the TS3005 is powered up, its FOUT terminal (and PWMOUT terminal, if enabled) is active once the applied VDD is higher than 1.55V. Once the applied VDD is higher than 1.55V, the master oscillator achieves steady-state operation within 18ms. 5 Weeks and 5 Days Counter Circuit with TS3005 The TS3005 can be configured into a 5 Weeks and 5 Days counter as shown in Figure 2. The circuit is composed of a TS3005 timer and a dual 74VHC393 4-bit counter. The TS3005 divider inputs are set to FDIV2:0 = 111. With an RSET of 11 MΩ, the FOUT period is approximately 30 hours. The complete circuit consumes approximately 4.5µA and is powered with a single 3V CR2032 lithium button cell battery. If a shorter period is desired, a 10 day period is available via output 1QD. Divide the PWMOUT Output Frequency by Two with the TS3005 Using a single resistor and capacitor, the TS3005 can be configured to a divide by two circuit as shown in Figure 3. To achieve a divide by two function with the TS3005, the pulse width of the PWMOUT output must be at least a factor of 2 greater than the period set at FOUT by resistor RSET. The CPWM capacitor selected must meet this pulse width requirement and can be calculated using Equation 2. In Figure 3, a value of 4.32MΩ for RS T sets the O T output period to 20.5ms. A CPWM capacitor of 0.1µF was chosen, which sets the pulse width of PWMOUT to Figure 3: Configuring the TS3005 into a Divide by Two Frequency Divider Figure 2: 5 Weeks and 5 Days Counter Circuit |
Số phần tương tự - TS3005ITD1033T |
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Mô tả tương tự - TS3005ITD1033T |
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