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ADP3310AR-5 bảng dữ liệu(PDF) 8 Page - Analog Devices |
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ADP3310AR-5 bảng dữ liệu(HTML) 8 Page - Analog Devices |
8 / 8 page ADP3310 –8– REV. A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Small Outline (SO-8) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) 45 85 4 1 0.1968 (5.00) 0.1890 (4.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.1574 (4.00) 0.1497 (3.80) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 5M55mV 5mAOS High Current Post Regulator with SOIC PMOS Post regulation for a switch-mode supply (Figure 15) can be implemented with a PMOS in an SO-8 package to provide a significant reduction in peak-to-peak ripple voltage. A constant dropout voltage in conjunction with low quiescent current yield a more efficient voltage regulator that can significantly extend battery life. The bottom waveform of Figure 16 is the output of the switching regulator. The top waveform is the output of the post regulator. In applications where cost is a higher concern than efficiency, a resistor divider can be used to provide feedback instead of the current mirror. Power efficiency is lower in cases of light loads. VOS 20mV/div 10mV/div VO 5 s Figure 16. Pre-and Post-Regulated Voltage |
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