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ADP3303AR-32 bảng dữ liệu(PDF) 7 Page - Analog Devices

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ADP3303
–7–
REV. A
Thermal Overload Protection
The ADP3303 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165
°C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation), where die temperature starts to rise above
165
°C, the output current is reduced until the die temperature
has dropped to a safe level. The output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125
°C.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
PD = (VIN – VOUT) ILOAD + (VIN) IGND
Where ILOAD and IGND are load current and ground current, VIN
and VOUT are input and output voltages, respectively.
Assuming ILOAD = 200 mA, IGND = 2 mA, VIN = 7 V and
VOUT = 5.0 V, device power dissipation is:
PD = (7 V – 5 V ) 200 mA + (7 V ) 2 mA = 414 mW
The proprietary package used in ADP3303 has a thermal
resistance of 96
°C/W, significantly lower than a standard 8-lead
SOIC package at 170
°C/W.
Junction temperature above ambient temperature will be ap-
proximately equal to:
0.414 W
× 96°C/W = 39.7°C
To limit the maximum junction temperature to 125
°C, maxi-
mum ambient temperature must be lower than:
TAMAX = 125°C – 40°C = 85°C
Printed Circuit Board Layout Consideration
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages, the dominant component of the heat
resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. To make the improvement mean-
ingful, however, a significant copper area on the PCB must be
attached to these fused pins.
The patented thermal coastline lead frame design of the
ADP3303 (Figure 22) uniformly minimizes the value of the
dominant portion of the thermal resistance. It ensures that heat
is conducted away by all pins of the package. This yields a very
low, 96
°C/W, thermal resistance for an SO-8 package, without
any special board layout requirements, relying on the normal
traces connected to the leads. The thermal resistance can be
decreased by approximately an additional 10% by attaching a
few square cm of copper area to the IN pin of the ADP3303.
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3303’s pins since it will increase
the junction to ambient thermal resistance of the package.
COPPER PADDLE
1
2
3
4
8
7
6
5
COPPER
LEAD-FRAME
Figure 22. Thermal Coastline
Error Flag Dropout Detector
The ADP3303 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If, for
example, the output is about to lose regulation by reducing the
supply voltage below the combined regulated output and drop-
out voltages, the ERR flag will be activated. The ERR output is
an open collector, which will be driven low.
Once set, the ERR flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
Shutdown Mode
Applying a TTL high signal to the shutdown (SD) pin, or tying
it to the input pin, will turn the output ON. Pulling SD down to
0.3 V or below, or tying it to ground, will turn the output OFF.
In shutdown mode, quiescent current is reduced to much less
than 1
µA.
APPLICATION CIRCUITS
Crossover Switch
The circuit in Figure 23 shows that two ADP3303s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide.


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