ADC912A datasheet(5/16 Pages) AD

tên linh kiện	ADC912A

Giải thích chi tiết về linh kiện	CMOS Microprocessor-Compatible 12-Bit A/D Converter

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REV. B

ADC912A

–5–

WAFER TEST LIMITS

ADC912AG

Parameter

Symbol

Conditions

Limit

Unit

Integral Nonlinearity

INL

±1

LSB max

Differential Nonlinearity

DNL

±1

LSB max

Offset Error

VZSE

Guaranteed by Design

±8

LSB max

Gain Error

GFSE

±8

LSB max

Analog Input Resistance

RAIN

4/6

k

Ω min/max

Logic Input High Voltage

VINH

CS, RD, HBEN

2.4

V min

Logic Input Low Voltage

VINL

CS, RD, HBEN

0.8

V max

Logic Input Current

IIN

CS, RD, HBEN

±1

µA max

Logic Output High Voltage

VOH

ISOURCE = 0.2 mA

4

V min

Logic Output Low Voltage

VOL

ISINK = 1.6 mA

0.4

V max

Positive Supply Current

IDD

VDD = +5 V, CS = RD = VDD, AIN = +10 V

7

mA max

Negative Supply Current

ISS

VSS = –12 V, CS = RD = VDD, AIN = +10 V

5

mA max

NOTE

Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed

for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.

(@ VDD = +5 V, VSS = –12 V or –15 V, VREF = –5 V, AIN = 0 V to 10 V, and TA = 25 C, unless otherwise noted.)

24

23

22

21

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

9

10

11

12

NC

C1

C2

C1

C2

+

C1

C2

C1

C2

+

10V

–5V

+5V

–15V

R

R = 10

C1 = 0.01 F

C2 = 4.7 F

NC = NO CONNECT

POWER SUPPLY SEQUENCE:

+5V, –15V, –5V, +10V

ADC912A

TOP VIEW

(Not to Scale)

Figure 9. Burn-In Circuit

Số phần tương tự - ADC912A

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	ADC912A	225Kb / 16P	CMOS Microprocessor-Compatible 12-Bit A/D Converter REV. B

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