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AD9888KS-205 bảng dữ liệu(PDF) 2 Page - Analog Devices |
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AD9888KS-205 bảng dữ liệu(HTML) 2 Page - Analog Devices |
2 / 32 page REV. A –2– AD9888–SPECIFICATIONS (V D = 3.3 V, VDD = 3.3 V, ADC Clock = Maximum Conversion Rate) Test AD9888KS-100/-140 1 AD9888KS-170 AD9888KS-205 Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max Unit RESOLUTION 8 8 8 Bits DC ACCURACY Differential Nonlinearity 25 °CI ±0.5 +1.25/–1.0 ±0.6 +1.25/–1.0 ±0.8 +1.50/–1.0 LSB Full VI +1.35/–1.0 +1.50/–1.0 +1.80/–1.0 LSB Integral Nonlinearity 25 °CI ±0.5 ±2.0 ±0.75 ±2.25 ±1.0 ±3.75 LSB Full VI ±2.5 ±2.75 ±4.25 LSB No Missing Codes 25 °C I Guaranteed Guaranteed Guaranteed ANALOG INPUT Input Voltage Range Minimum 25 °C I 0.5 0.5 0.5 V p-p Maximum 25 °C I 1.0 1.0 1.0 V p-p Gain Tempco 25 °C V 100 100 100 ppm/ °C Input Bias Current 25 °CIV 1 1 1 µA Full IV 2 2 2 µA Input Capacitance Full V 3 3 3 pF Input Resistance Full IV 1 1 1 M Ω Input Offset Voltage Full VI 7 90 7 90 7 90 mV Input Full-Scale Matching Full VI 2.5 9.0 2.5 9.0 2.5 9.0 % FS Offset Adjustment Range Full VI 44 49 53 44 49 53 44 49 53 % FS REFERENCE OUTPUT Output Voltage Full VI 1.20 1.25 1.30 1.20 1.25 1.30 1.20 1.25 1.30 V Temperature Coefficient Full V ±50 ±50 ±50 ppm/ °C SWITCHING PERFORMANCE Maximum Conversion Rate Full VI 100/140 170 205 MSPS Minimum Conversion Rate Full IV 10 10 10 MSPS Data to Clock Skew Full IV –1.25 +1.25 –1.25 +1.25 –1.25 +1.25 ns tBUFF 2 Full VI 4.7 4.7 4.7 µs tSTAH 2 Full VI 4.0 4.0 4.0 µs tDHO 2 Full VI 0 0 0 µs tDAL 2 Full VI 4.7 4.7 4.7 µs tDAH 2 Full VI 4.0 4.0 4.0 µs tDSU 2 Full VI 250 250 250 ns tSTASU 2 Full VI 4.7 4.7 4.7 µs tSTOSU 2 Full VI 4.0 4.0 4.0 µs HSYNC Input Frequency Full IV 15 110 15 110 15 110 kHz Maximum PLL Clock Rate Full VI 100/140 170 205 MHz Minimum PLL Clock Rate Full IV 10 10 10 MHz PLL Jitter 25 °C IV 470 700 3 450 700 4 440 700 4 ps p-p Full IV 1000 3 1000 4 1000 4 ps p-p Sampling Phase Tempco Full IV 15 15 15 ps/ °C DIGITAL INPUTS Input Voltage, High (VIH) Full VI 2.5 2.5 2.5 V Input Voltage, Low (VIL) Full VI 0.8 0.8 0.8 V Input Current, High (IIH) Full IV –1.0 –1.0 –1.0 µA Input Current, Low (IIL) Full IV +1.0 +1.0 +1.0 µA Input Capacitance 25 °CV 3 3 3 pF DIGITAL OUTPUTS Output Voltage, High (VOH) Full VI VD – 0.1 VD – 0.1 VD – 0.1 V Output Voltage, Low (VOL) Full VI 0.1 0 .1 0.1 V Duty Cycle DATACK, DATACK Full IV 44 49 55 44 49 55 44 49 55 % Output Coding Binary Binary Binary POWER SUPPLY VD Supply Voltage Full IV 3.0 3.3 3.6 3.0 3.3 3.6 3.0 3.3 3.6 V VDD Supply Voltage Full IV 2.2 3.3 3.6 2.2 3.3 3.6 2.2 3.3 3.6 V PVD Supply Voltage Full IV 3.0 3.3 3.6 3.0 3.3 3.6 3.0 3.3 3.6 V ID Supply Current (VD)25 °C V 200 215 230 mA IDD Supply Current (VDD) 5 25 °C V 50 55 60 mA IPVD Supply Current (PVD)25 °CV 8 9 10 mA Total Power Dissipation Full VI 850 1050 920 1150 990 1250 mW Power-Down Supply Current Full VI 12 20 12 20 12 20 mA Power-Down Dissipation Full VI 40 66 40 66 40 66 mW |
Số phần tương tự - AD9888KS-205 |
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Mô tả tương tự - AD9888KS-205 |
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