công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
AD8804AR bảng dữ liệu(PDF) 3 Page - Analog Devices |
|
AD8804AR bảng dữ liệu(HTML) 3 Page - Analog Devices |
3 / 16 page AD8802/AD8804 REV. 0 –3– ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise noted) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3, + 8 V VREFX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, VDD Outputs (Ox) to GND . . . . . . . . . . . . . . . . . . . . . . . . 0 V, VDD Digital Input Voltage to GND . . . . . . . . . . . . . . . . . 0 V, +8 V Operating Temperature Range . . . . . . . . . . . . –40 °C to +85°C Maximum Junction Temperature (TJ MAX) . . . . . . . . +150°C Storage Temperature . . . . . . . . . . . . . . . . . . –65 °C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300 °C Package Power Dissipation . . . . . . . . . . . . (TJ MAX – TA)/θJA Thermal Resistance θ JA, SOIC (SOL-20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 °C/W P-DIP (N-20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 °C/W TSSOP-20 (RU-20) . . . . . . . . . . . . . . . . . . . . . . . . 155 °C/W AD8802 PIN DESCRIPTIONS Pin Name Description 1VREF Common DAC Reference Input 2 O1 DAC Output #1, addr = 00002 3 O2 DAC Output #2, addr = 00012 4 O3 DAC Output #3, addr = 00102 5 O4 DAC Output #4, addr = 00112 6 O5 DAC Output #5, addr = 01002 7 O6 DAC Output #6, addr = 01012 8 SHDN Reference input current goes to zero. DAC latch settings maintained 9 CS Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded based on the address bits and loaded into the target DAC register 10 GND Ground 11 CLK Serial Clock Input, Positive Edge Triggered 12 SDI Serial Data Input 13 O7 DAC Output #7, addr = 01102 14 O8 DAC Output #8, addr = 01112 15 O9 DAC Output #9, addr = 10002 16 O10 DAC Output #10, addr = 10012 17 O11 DAC Output #11, addr = 10102 18 O12 DAC Output #12, addr = 10112 19 RS Asynchronous Preset to Midscale Output Setting. Loads all DAC Registers with 80H 20 VDD Positive Power Supply, Specified for Operation at Both +3 V and +5 V PIN CONFIGURATIONS 14 13 12 11 17 16 15 20 19 18 9 8 1 2 3 4 7 6 5 10 O10 O11 O12 VDD O7 O8 O9 VREFL CLK SDI VREFH O1 O2 O3 O4 O5 O6 SHDN CS GND TOP VIEW (Not to Scale) AD8804 14 13 12 11 17 16 15 20 19 18 10 9 8 1 2 3 4 7 6 5 TOP VIEW (Not to Scale) VREFH O11 O12 RS VDD O1 O2 O3 AD8802 O8 O9 O10 O4 O5 O6 SHDN CS GND CLK SDI O7 AD8804 PIN DESCRIPTIONS Pin Name Description 1VREFH Common High-Side DAC Reference Input 2 O1 DAC Output #1, addr = 00002 3 O2 DAC Output #2, addr = 00012 4 O3 DAC Output #3, addr = 00102 5 O4 DAC Output #4, addr = 00112 6 O5 DAC Output #5, addr = 01002 7 O6 DAC Output #6, addr = 01012 8 SHDN Reference input current goes to zero DAC latch settings maintained 9 CS Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded based on the address bits and loaded input the target DAC register 10 GND Ground 11 VREFL Common Low-Side DAC Reference Input 12 CLK Serial Clock Input, Positive Edge Triggered 13 SDI Serial Data Input 14 O7 DAC Output #7, addr = 01102 15 O8 DAC Output #8, addr = 01112 16 O9 DAC Output #9, addr = 10002 17 O10 DAC Output #10, addr = 10012 18 O11 DAC Output #11, addr = 10102 19 O12 DAC Output #12, addr = 10112 20 VDD Positive power supply, specified for operation at both +3 V and +5 V ORDERING GUIDE Temperature Package Package Model FTN Range Description Option AD8802AN RS –40 °C/+85°C PDIP-20 N-20 AD8802AR RS –40 °C/+85°C SOL-20 R-20 AD8802ARU RS –40 °C/+85°C TSSOP-20 RU-20 AD8804AN REFL – 40 °C/+85°C PDIP-20 N-20 AD8804AR REFL – 40 °C/+85°C SOL-20 R-20 AD8804ARU REFL – 40 °C/+85°C TSSOP-20 RU-20 WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although these devices feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. |
Số phần tương tự - AD8804AR |
|
Mô tả tương tự - AD8804AR |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |