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AD8038AR bảng dữ liệu(PDF) 4 Page - Analog Devices |
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AD8038AR bảng dữ liệu(HTML) 4 Page - Analog Devices |
4 / 12 page REV. B –4– AD8038/AD8039 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8038/AD8039 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE ABSOLUTE MAXIMUM RATINGS * Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2 Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±4 V Storage Temperature . . . . . . . . . . . . . . . . . . –65 °C to +125°C Operating Temperature Range . . . . . . . . . . . –40 °C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300 °C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8038/AD8039 package is limited by the associated rise in junction temperature (TJ) on the die. The plastic encapsulating the die will locally reach the junction temperature. At approximately 150 °C, which is the glass transition temperature, the plastic will change its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8038/AD8039. Exceeding a junction tempera- ture of 175 °C for an extended period of time can result in changes in the silicon devices, potentially causing failure. The still-air thermal properties of the package and PCB ( JA), ambient temperature (TA), and total power dissipated in the package (PD) determine the junction temperature of the die. The junction temperature can be calculated as follows: TT P AD A J =+ × () θ J The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). Assuming the load (RL) is referenced to midsupply, then the total drive power is VS / 2 × IOUT, some of which is dissipated in the package and some in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. PD = quiescent power + (total drive power – load power) PV I V V R V R DS S S OUT L OUT L =× []+ ()×() [] [] // – / 2 2 AMBIENT TEMPERATURE – C 0 –55 1.0 –25 5 35 65 95 125 1.5 2.0 SOIC-8 0.5 SOT23-8 SC70-5 Figure 2. Maximum Power Dissipation vs. Temperature for a Four-Layer Board RMS output voltages should be considered. If RL is referenced to VS–, as in single-supply operation, then the total drive power is VS IOUT. If the RMS signal levels are indeterminate, then consider the worst case, when VOUT = VS / 4 for RL to midsupply: PV I V R DS S S L =× ()+() // 4 2 In single-supply operation with RL referenced to VS–, worst case is VOUT = VS / 2. Airflow will increase heat dissipation effectively reducing JA. Also, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes, will reduce the JA. Care must be taken to minimize parasitic capacitances at the input leads of high speed op amps as discussed in the board layout section. Figure 2 shows the maximum safe power dissipation in the package versus the ambient temperature for the SOIC-8 (125 °C/W), SC70-5 (210 °C/W), and SOT23-8 (160°C/W) package on a JEDEC standard four-layer board. JA values are approximations. OUTPUT SHORT CIRCUIT Shorting the output to ground or drawing excessive current from the AD8038/AD8039 will likely cause a catastrophic failure. ORDERING GUIDE Model Temperature Range Package Description Package Outline Branding Information AD8038AR –40 °C to +85°C 8-Lead SOIC SO-8 AD8038AR-REEL –40 °C to +85°C 8-Lead SOIC SO-8 AD8038AR-REEL7 –40 °C to +85°C 8-Lead SOIC SO-8 AD8038AKS-REEL –40 °C to +85°C 5-Lead SC70 KS-5 HUA AD8038AKS-REEL7 –40 °C to +85°C 5-Lead SC70 KS-5 HUA AD8039AR –40 °C to +85°C 8-Lead SOIC SO-8 AD8039AR-REEL –40 °C to +85°C 8-Lead SOIC SO-8 AD8039AR-REEL7 –40 °C to +85°C 8-Lead SOIC SO-8 AD8039ART-REEL * –40 °C to +85°C 8-Lead SOT23 RT-8 HYA AD8039ART-REEL7 * –40 °C to +85°C 8-Lead SOT23 RT-8 HYA *Under development. |
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Mô tả tương tự - AD8038AR |
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