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AD7112CR bảng dữ liệu(PDF) 11 Page - Analog Devices

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AD7112CR bảng dữ liệu(HTML) 11 Page - Analog Devices

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AD7112
REV. 0
–11–
OUTPUT
INPUT
VARIABLE
GAIN ELEMENT
1/2 AD7112
D
UP/DOWN COUNTER
U
VREF
END STOP AND
CONTROL LOGIC
DETECTOR
COMPARATOR
Figure 21. Automatic Gain Control System
Programmable State Variable Filter
The AD7112 with its multiplying capability and fast settling
time is ideal for many types of signal conditioning applications.
The circuit of Figure 22 shows its use in a state variable filter
design. This type of filter has three outputs: low pass, bandpass
and high pass. The particular version shown in Figure 22 uses
two AD7112 to control the critical parameters f0, Q and A0. In-
stead of several fixed resistors, the circuit uses the DAC equiva-
lent resistances as circuit elements. Thus, R1 in Figure 22 is
controlled by the 8-bit word loaded to DAC A1 of the AD7112.
This is also the case with R2, R3 and R4.
DAC Equivalent Resistance,
REQ =
RDAC
10
× EXP (–0.375 × N /20)
where:
RDAC is the DAC ladder resistance.
N is the DAC code in Decimal (0
≤N≤240).
DACs A1 and B1 control the gain and Q of the filter character-
istic while DACs A2 and B2 control the cutoff frequency.
Circuit equations:
C1 = C2, R3 = R4, R7 = R8.
Resonant frequency, f0 = 1/(2
π R3C1).
Quality factor, Q = (R6/R8)
× (R2/R
FBB1).
RFBB1 is the feedback resistance of DAC B1 in Figure 22
Bandpass Gain, A0 = –R2/R1.
Programmable range for component values shown is f0 = 0 kHz
to 15 kHz and Q = 0.3 to 4.5.
DATA 2
OUT A
AD7112
DAC A1
(R1)
VIN A
RFB B
C3
10pF
VIN
NOTES
1. A1, A2, A3, A4 : 1/4 x AD713
2. C3 IS A COMPENSATION CAPACITOR TO ELIMINATE Q AND GAIN VARIATIONS
CAUSED BY AMPLIFIER GAIN BANDWIDTH LIMITATIONS
HIGH
PASS
OUTPUT
OUT B
DAC B1
(R2)
BANDPASS
OUTPUT
VIN B
LOW-PASS
OUTPUT
R7
30k
R8
30k
R6
10k
C1
1000pF
C2
1000pF
R5
DB0–DB7
CS
WR
DAC A/
DAC B
DATA 1
DAC A2
(R3)
DAC B2
(R4)
A1
OUT A
AD7112
VIN A
OUT B
VIN B
DB0–DB7
CS
WR
DAC A/
DAC B
A2
A3
A4
Figure 22. Programmable State Variable Filter


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