AD7013ARS datasheet(6/20 Pages) AD

tên linh kiện	AD7013ARS

Giải thích chi tiết về linh kiện	CMOS TIA IS-54 Baseband Receive Port

Download	20 Pages

Scroll/Zoom	100%

nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

Logo

6 / 20 page

–6–

REV. A

AD7013

Limit at

Parameter

T

A = –40°C to +85°C

Units

Description

t

1

160

ns min

MCLK Cycle Time

t

2

65

ns min

MCLK High Time

t

3

65

ns min

MCLK Low Time

t

4

20

ns min

MCLK Rising Edge to DxCLK Rising Edge Propagation Delay

60

ns max

t

5

2t

1

ns

DxCLK Cycle Time

t

6

t

1–20

ns min

DxCLK Minimum High Time

t

7

t

1–20

ns min

DxCLK Minimum Low Time

t

8

25

ns min

DxCLK Rising Edge to FRAME IN Setup Time

t

9

10

ns min

DxCLK Rising Edge to FRAME IN Hold Time

t

10

16t

5

ns min

FRAME IN Cycle Time

t

11

25

ns min

DxCLK Rising Edge to DATA IN Setup Time

t

12

10

ns min

DxCLK Rising Edge to DATA IN Hold Time

t

13

0

ns min

FRAME IN Rising Edge to FRAME OUT Rising Edge Propagation Delay

25

ns max

t

14

25

ns max

MODE1 Low to FRAME OUT 3-STATE

t

15

25

ns max

MODE1 High to FRAME OUT Active

NOTE

1t

14 is derived from the measured time taken by the FRAME OUT pin to change 0.5 V when loaded with the circuit of Figure 1.

The measured number is then

extrapolated back to remove the effects of charging or discharging the 80 pF capacitor. This means that the time quoted in the Timing Characteristics is the

(V

AA = +5 V ± 10%; VDD = +5 V ± 10%; AGND = DGND =0 V,

f

MCLK = 6.2208 MHz; TA = TMIN to TMAX, unless otherwise noted)

CONTROL SERIAL INTERFACE TIMING1

MxCLK (I)

DxCLK (O)

DATA IN (I)

NOTE: (O) INDICATES AN OUTPUT, (I) INDICATES AN INPUT, MODE1 = LOGIC HIGH

MODE1 (I)

t

14

t

15

FRAME OUT (O)

t

13

FRAME IN (I)

t

8

t

10

DATA

DB9

DB8

DB1

DB0

A3

A0

S1

S0

ADDRESS

IGNORED

t

11

t

12

t

4

t

1

t

2

t

3

t

9

t

6

t

7

3 – STATE

t

5

Figure 2. 16-Bit Serial Interface for Writing to the AD7013 Internal Registers

1.6mA

IOL

CL

50pF

TO OUTPUT PIN

+2.1V

IOH

200

µA

Figure 1. Load Circuit for Digital Outputs

Số phần tương tự - AD7013ARS

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD7013	456Kb / 20P	CMOS TIA IS-54 Baseband Receive Port REV. A

More results

Mô tả tương tự - AD7013ARS

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD7013	456Kb / 20P	CMOS TIA IS-54 Baseband Receive Port REV. A
	AD7011	393Kb / 12P	CMOS, ADC 4 DQPSK Baseband Transmit Port REV. B
	AD7010	170Kb / 8P	CMOS JDC 4 DQPSK Baseband Transmit Port REV. B
	AD7010	249Kb / 8P	CMOS JDC p/4 DQPSK Baseband Transmit Port REV. B
	AD7011	389Kb / 12P	CMOS, ADC p/4 DQPSK Baseband Transmit Port REV. B
NXP Semiconductors	SA638	48Kb / 5P	IS-54 IF receiver 1995 Feb 16
California Micro Device...	G8912B	373Kb / 8P	CMOS PCM Transmit/receive Filters
M/A-COM Technology Solu...	02020-DSH-001-F	300Kb / 15P	4 Gbps CMOS TIA with AGC
Sony Corporation	CXL5520M	120Kb / 9P	CMOS-CCD Baseband 1H Delay Line
Skyworks Solutions Inc.	RFX2402E	681Kb / 7P	CMOS 2.4GHZ TRANSMIT/RECEIVE WLAN RFeIC

More results

AD7013ARS bảng dữ liệu(PDF) 6 Page - Analog Devices

AD7013ARS bảng dữ liệu(HTML) 6 Page - Analog Devices

Số phần tương tự - AD7013ARS

Mô tả tương tự - AD7013ARS

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

bảng dữ liệu tải về

Link URL