AD622

REV. C

–8–

Table I. Make vs. Buy Error Budget

Total Error

Total Error

in ppm

in ppm

AD622 Circuit

“Homebrew” Circuit

Relative to 1 V FS

Relative to 1 V FS

Error Source

Calculation

Calculation

AD622

Homebrew

Total RTI Offset Voltage,

µV

250

µV + 1500 µV/10

800

µV × 2

400

1600

Input Offset Current, nA

2.5 nA

× 1kΩ

15 nA

× 1 kΩ

2.5

15

CMR, dB

86 dB

→50 ppm × 0.5 V

(0.1% Match

× 0.5 V)/10 V

25

50

Total Absolute Error

427.5

1665

DRIFT TO +85

°C

Gain Drift, ppm/

°C

(50 ppm + 5 ppm)

× 60°C

(50 ppm)/

°C × 60°C

3300

3000

Total RTI Offset Voltage,

µV/°C(2 µV/°C + 15 µV/°C/10) × 60°C9 µV/°C × 2 × 60°C

210

1080

Input Offset Current, pA/

°C

2 pA/

°C × 1kΩ × 60°C

155 pA/

°C × 1kΩ × 60°C

0.12

9.3

Total Drift Error

3510.12

4089.3

RESOLUTION

Gain Nonlinearity, ppm of Full Scale

10 ppm

20 ppm

10

20

Typ 0.1 Hz–10 Hz Voltage Noise,

µV p-p 0.6 µV p-p

0.55

µV p-p × √2

0.6

0.778

Total Resolution Error

10.6

20.778

Grand Total Error

3948

5575

GAIN SELECTION

cisely, by whatever impedance appears between Pins 1 and 8.

The AD622 is designed to offer gains as close as possible to

popular integer values using standard 1% resistors. Table II

50.5

k

Ω

G

−1

To minimize gain error avoid high parasitic resistance in series

TC—less than 10 ppm/

°C for the best performance.

Table II. Required Values of Gain Resistors

Desired

1% Std Table

Calculated

Gain

Gain

2

51.1 k

1.988

5

12.7 k

4.976

10

5.62 k

9.986

20

2.67 k

19.91

33

1.58 k

32.96

40

1.3 k

39.85

50

1.02 k

50.50

65

787

65.17

100

511

99.83

200

255

199.0

500

102

496.1

1000

51.1

989.3