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AD571SD bảng dữ liệu(PDF) 3 Page - Analog Devices |
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AD571SD bảng dữ liệu(HTML) 3 Page - Analog Devices |
3 / 8 page AD571 REV. A –3– ABSOLUTE MAXIMUM RATINGS V+ to Digital Common AD571J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +7 V AD571K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +16.5 V V– to Digital Common . . . . . . . . . . . . . . . . . . . 0 V to –16.0 V Analog Common to Digital Common . . . . . . . . . . . . . . . ±1 V Analog Input to Analog Common . . . . . . . . . . . . . . . . . ±15 V Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V+ Digital Outputs (Blank Mode) . . . . . . . . . . . . . . . . . . 0 V to V+ Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW CIRCUIT DESCRIPTION The AD571 is a complete 10-bit A/D converter which requires no external components to provide the complete successive- approximation analog-to-digital conversion function. A block diagram of the AD571 is shown on front page of this data sheet. Upon receipt of the CONVERT command, the internal 10-bit current output DAC is sequenced by the I 2L successive- approximation register (SAR) from its most-significant bit (MSB) to least-significant bit (LSB) to provide an output cur- rent which accurately balances the input signal current through the 5 k Ω input resistor. The comparator determines whether the addition of each successively-weighted bit current causes the DAC current sum to be greater or less than the input current; if the sum is less the bit is left on, if more, the bit is turned off. Af- ter testing all the bits, the SAR contains a 10-bit binary code which accurately represents the input signal to within ±1/2 LSB (0.05%). Upon completion of the sequence, the SAR sends out a DATA READY signal (active low), which also brings the three-state buffers out of their “open” state, making the bit output lines be- come active high or low, depending on the code in the SAR. When the BLANK and CONVERT line is brought high, the output buffers again go “open”, and the SAR is prepared for another conversion cycle. Details of the timing are given in the Control and Timing section. The temperature compensated buried Zener reference provides the primary voltage reference to the DAC and guarantees excel- lent stability with both time and temperature. The bipolar offset input controls a switch which allows the positive bipolar offset current (exactly equal to the value of the MSB less 1/2 LSB) to be injected into the summing (+) node of the comparator to offset the DAC output. Thus the nominal 0 V to +10 V unipo- lar input range becomes a –5 V to +5 V range. The 5 k Ω thin- film input resistor is trimmed so that with a full-scale input signal, an input current will be generated which exactly matches the DAC output with all bits on. (The input resistor is trimmed slightly low to facilitate user trimming, as discussed on the next page.) POWER SUPPLY SELECTION The AD571 is designed for optimum performance using a +5 V and –15 V supply, for which the AD571J and AD571S are specified. AD571K will also operate with up to a +15 V supply, which allows direct interface to CMOS logic. The input logic threshold is a function of V+ as shown in Figure 1. The supply current drawn by the device is a function of both V+ and the operating mode (BLANK or CONVERT). These supply cur- rents variations are shown in Figure 2. The supply currents change only moderately over temperature as shown in Figure 6. V+ – Volts 9 4 1 516 6 7 8 9 10 1112 1314 15 8 5 3 2 7 6 Figure 1. Logic Threshold (AD571K Only) V+/V– – Volts 12 4 1 516 67 8 9 10 1112 1314 15 11 5 3 2 10 6 7 8 9 I–, CONVERT MODE AIN = 0 to +10V I–, BLANK MODE I+, CONVERT MODE VIN = 0V I+, CONVERT MODE VIN = +10V I+, BLANK MODE 4.5 Figure 2. Supply Currents vs. Supply Levels and Operating Modes CONNECTING THE AD571 FOR STANDARD OPERATION The AD571 contains all the active components required to per- form a complete A/D conversion. For most situations, all that is necessary is connection of the power supply (+5 V and –15 V), the analog input, and the conversion start pulse. However, there are some features and special connections which should be consid- ered for optimum performance. The functional pinout is shown in Figure 3. |
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