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AD557JP bảng dữ liệu(PDF) 2 Page - Analog Devices

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AD557–SPECIFICATIONS
Model
Min
Typ
Max
Units
RESOLUTION
8
Bits
RELATIVE ACCURACY
0 to + 70
°C
± 1/2
1
LSB
OUTPUT
Ranges
0 to + 2.56
V
Current Source
+5
mA
Sink
Internal Passive
Pull-Down to Ground
2
OUTPUT SETTLING TIME
3
0.8
1.5
µs
FULL-SCALE ACCURACY
4
@ +25
°C
± 1.5
± 2.5
LSB
TMIN to TMAX
± 2.5
± 4.0
LSB
ZERO ERROR
@ +25
°C
± 1
LSB
TMIN to TMAX
± 3
LSB
MONOTONICITY
5
TMIN to TMAX
Guaranteed
DIGITAL INPUTS
TMIN to TMAX
Input Current
100
µA
Data Inputs, Voltage
Bit On—Logic “1”
2.0
V
Bit On—Logic “0”
0
0.8
V
Control Inputs, Voltage
On—Logic “1”
2.0
V
On—Logic “0”
0
0.8
V
Input Capacitance
4
pF
TIMING
6
tW Strobe Pulse Width
225
ns
TMIN to TMAX
300
ns
tDH Data Hold Time
10
ns
TMIN to TMAX
10
ns
tDS Data Setup Time
225
ns
TMIN to TMAX
300
ns
POWER SUPPLY
Operating Voltage Range (VCC)
2.56 Volt Range
+4.5
+5.5
V
Current (ICC)15
25
mA
Rejection Ratio
0.03
%/%
POWER DISSIPATION, VCC = 5 V
75
125
mW
OPERATING TEMPERATURE RANGE
0
+70
°C
NOTES
1 Relative Accuracy is defined as the deviation of the code transition points from the
ideal transfer point on a straight line from the zero the the full scale of the device.
2Passive pull-down resistance is 2 k
Ω.
3Settling time is specified for a positive-going full-scale step to
±1/2 LSB. Negative-
going steps to zero are slower, but can be improved with an external pull-down.
4The full-scale output voltage is 2.55 V and is guaranteed with a +5 V supply.
5A monotonic converter has a maximum differential lineraity error of
±1 LSB.
6See Figure 7.
Specifications subject to change without notice.
(@ TA = +25 C, VCC = +5 V unless otherwise noted)
PIN CONFIGURATIONS
DIP
10
9
13
12
11
16
15
14
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD557
LSB BIT 8
GND
VOUT SENSE B
VOUT SENSE A
VOUT
BIT 7
BIT 6
BIT 5
CS
+VCC
GND
BIT 4
BIT 3
BIT 2
MSB BIT 1
CE
PLCC
20 19
18
1
2
3
4
5
6
7
8
910
11 12
13
14
15
16
17
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
BIT 6
BIT 5
NC
BIT 4
BIT 3
VOUT SENSE B
GND
NC
GND
+VCC
NC = NO CONNECT
AD557
ABSOLUTE MAXIMUM RATINGS
*
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
Digital Inputs (Pins 1–10) . . . . . . . . . . . . . . . . . . 0 V to +7.0 V
VOUT . . . . . . . . . . . . . . . . . . . . . . . Indefinite Short to Ground
Momentary Short to VCC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Storage Temperature Range
N/P (Plastic) Packages . . . . . . . . . . . . . . . . –25
°C to +100°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . . 300
°C
Thermal Resistance
Junction to Ambient/Junction to Case
N/P (Plastic) Packages . . . . . . . . . . . . . . . . . . 140/55
°C/W
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
REV. A
–2–
ORDERING GUIDE
Model
Temperature Range
Package Option*
AD557JN
0
°C to +70°C
N-16
AD557JP
0
°C to +70°C
P-20A
*N = Plastic DIP; P = Plastic Leaded Chip Carrier.
CIRCUIT DESCRIPTION
The AD557 consists of four major functional blocks fabricated
on a single monolithic chip (see Figure 1). The main D/A con-
verter section uses eight equally weighted laser-trimmed current
sources switched into a silicon-chromium thin-film R/2R resistor
ladder network to give a direct but unbuffered 0 mV to 400 mV
output range. The transistors that form the DAC switches are
PNPs; this allows direct positive-voltage logic interface and a
zero-based output range.


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