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AD204KY bảng dữ liệu(PDF) 6 Page - Analog Devices

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REV. B
–6–
AD202/AD204
work for any gain. Keep the resistance in series with input LO
below a few hundred ohms to avoid CMR degradation.
Figure 8a. Adjustments for Noninverting Connection of
Op Amp
Also shown in Figure 8a is the preferred means of adjusting the
gain-setting network. The circuit shown gives a nominal RF of
50 k
Ω, and will work properly for gains of ten or greater. The
adjustment becomes less effective at lower gains (its effect is
halved at G = 2) so that the pot will have to be a larger fraction
of the total RF at low gain. At G = 1 (follower) the gain cannot
be adjusted downward without compromising input resistance;
it is better to adjust gain at the signal source or after the output.
Figure 8b shows adjustments for use with inverting input cir-
cuits. The zero adjustment nulls the voltage at the summing
node. This method is preferable to current injection because it is
less affected by subsequent gain adjustment. Gain adjustment is
again done in the feedback; but in this case it will work all the
way down to unity gain (and below) without alteration.
Figure 8b. Adjustments for Summing or Current Input
Figure 9 shows how zero adjustment is done at the output by
taking advantage of the semi-floating output port. The range of
this adjustment will have to be increased at higher gains; if that
is done, be sure to use a suitably stable supply voltage for the
pot circuit.
There is no easy way to adjust gain at the output side of the iso-
lator itself. If gain adjustment must be done on the output side,
it will have to be in a following circuit such as an output buffer
or filter.
Figure 9. Output-Side Zero Adjustment
Common-Mode Performance.
Figures 10a and 10b show
how the common-mode rejection of the AD202 and AD204 var-
ies with frequency, gain, and source resistance. For these isola-
tors, the significant resistance will normally be that the path
from the source of the common-mode signal to IN COM. The
AD202 and AD204 also perform well in applications requiring
rejection of fast common-mode steps, as described in the Appli-
cations section.
Figure 10a. AD204
(Circuit figures shown on this page are for SIP style pack-
ages. Refer to page 3 for proper DIP package pinout.)


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