AD1852 datasheet(3/16 Pages) AD

tên linh kiện	AD1852

Giải thích chi tiết về linh kiện	Stereo, 24-Bit, 192 kHz Multibit DAC

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nhà sản xuất	AD [Analog Devices]

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–3–

REV. 0

AD1852

TEMPERATURE RANGE

Min

Typ

Max

Unit

Specifications Guaranteed

25

°C

Functionality Guaranteed

0

70

°C

Storage

–55

+150

°C

Specifications subject to change without notice.

POWER

Min

Typ

Max

Unit

Supplies

Voltage, Analog and Digital

4.50

5

5.50

V

Analog Current

33

40

mA

Analog Current—

RESET

32

46

mA

Digital Current

20

30

mA

Digital Current—

RESET

27

37

Dissipation

Operation—Both Supplies

265

mW

Operation—Analog Supply

165

mW

Operation—Digital Supply

100

mW

Power Supply Rejection Ratio

1 kHz 300 mV p-p Signal at Analog Supply Pins

–60

dB

20 kHz 300 mV p-p Signal at Analog Supply Pins

–50

dB

Specifications subject to change without notice.

DIGITAL FILTER CHARACTERISTICS

Sample Rate (kHz)

Passband (kHz)

Stopband (kHz)

Stopband Attenuation (dB)

Passband Ripple (dB)

44.1

DC–20

24.1–328.7

110

±0.0002

48

DC–21.8

26.23–358.28

110

±0.0002

96

DC–39.95

56.9–327.65

115

±0.0005

192

DC–87.2

117–327.65

95

+0/–0.04 (DC–21.8 kHz)

+0/–0.5 (DC–65.4 kHz)

+0/–1.5 (DC–87.2 kHz)

Specifications subject to change without notice.

GROUP DELAY

Chip Mode

Group Delay Calculation

FS

Group Delay

Unit

INT8x Mode

5553/(128

× F

S)

48 kHz

903.8

µs

INT4x Mode

5601/(64

× F

S)

96 kHz

911.6

µs

INT2x Mode

5659/(32

× F

S)

192 kHz

921

µs

Specifications subject to change without notice.

DIGITAL TIMING (Guaranteed Over 0 C to 70 C, AVDD = DVDD = +5.0 V

10%)

Min

Unit

tDMP

MCLK Period (FMCLK = 256

× FL/RCLK)*

54

ns

tDML

MCLK LO Pulsewidth (All Modes)

0.4

× t

DMP

ns

tDMH

MCLK HI Pulsewidth (All Modes)

0.4

× t

DMP

ns

tDBH

BCLK HI Pulsewidth

20

ns

tDBL

BCLK LO Pulsewidth

20

ns

tDBP

BCLK Period

60

ns

tDLS

L/

RCLK Setup

20

ns

tDLH

L/

RCLK Hold (DSP Serial Port Mode Only)

5

ns

tDDS

SDATA Setup

5

ns

tDDH

SDATA Hold

10

ns

tRSTL

RST LO Pulsewidth

15

ns

*Higher MCLK frequencies are allowable when using the on-chip Master Clock Autodivide Feature.

Specifications subject to change without notice.

Số phần tương tự - AD1852

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD1852JRSZ	515Kb / 20P	Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC REV. A
	AD1852JRSZRL	515Kb / 20P	Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC REV. A
	AD1852	501Kb / 20P	Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC REV. A

More results

Mô tả tương tự - AD1852

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	AD1853JRSZ	358Kb / 16P	Stereo, 24-Bit, 192 kHz, Multibit DAC REV. A
	AD1853	416Kb / 16P	Stereo, 24-Bit, 192 kHz, Multibit DAC REV. A
	AD1853	358Kb / 16P	Stereo, 24-Bit, 192 kHz, Multibit DAC REV. A
	AD1852	501Kb / 20P	Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC REV. A
	AD1852JRSZRL	515Kb / 20P	Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC REV. A
Wolfson Microelectronic...	WM8727	180Kb / 16P	24 BIT 192 KHZ STEREO DAC
Cirrus Logic	CS4340A	695Kb / 21P	24-Bit, 192 kHz Stereo DAC for Audio
Cirrus Logic	CS4340A	628Kb / 20P	24-Bit, 192 kHz Stereo DAC for Audio?
Analog Devices	AD1855	233Kb / 15P	Stereo, 96 kHz, Multibit DAC REV. B
Analog Devices	AD1833A	687Kb / 20P	24-Bit, 192 kHz, DAC REV. 0

More results

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