công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

AD1845JP-REEL bảng dữ liệu(PDF) 7 Page - Analog Devices

tên linh kiện AD1845JP-REEL
Giải thích chi tiết về linh kiện  Parallel-Port 16-Bit SoundPort Stereo Codec
Download  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

AD1845JP-REEL bảng dữ liệu(HTML) 7 Page - Analog Devices

Back Button AD1845JP-REEL Datasheet HTML 3Page - Analog Devices AD1845JP-REEL Datasheet HTML 4Page - Analog Devices AD1845JP-REEL Datasheet HTML 5Page - Analog Devices AD1845JP-REEL Datasheet HTML 6Page - Analog Devices AD1845JP-REEL Datasheet HTML 7Page - Analog Devices AD1845JP-REEL Datasheet HTML 8Page - Analog Devices AD1845JP-REEL Datasheet HTML 9Page - Analog Devices AD1845JP-REEL Datasheet HTML 10Page - Analog Devices AD1845JP-REEL Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 40 page
background image
AD1845
–7–
REV. C
PIN FUNCTION DESCRIPTIONS
Parallel Interface
Pin Name
PLCC
TQFP
I/O
Description
CDRQ
12
7
O
Capture Data Request. The assertion of this signal HI indicates that the codec has a cap-
tured audio sample from the ADC ready for transfer. This signal will remain asserted
until the internal capture FIFO is empty.
CDAK
11
6
I
Capture Data Acknowledge. The assertion of this active LO signal indicates that the
RD
cycle occurring is a DMA read from the capture buffer.
PDRQ
14
9
O
Playback Data Request. The assertion of this signal HI indicates that the codec is ready
for more DAC playback data. The signal will remain asserted until the internal playback
FIFO is full.
PDAK
13
8
I
Playback Data Acknowledge. The assertion of this active LO signal indicates that the
WR
cycle occurring is a DMA write to the playback buffer.
ADR1:0
9 & 10
100 & 1
I
Codec Addresses. These address pins are asserted by the codec interface logic during a
control register/PIO access. The state of these address lines determine which direct
register is accessed.
RD
60
75
I
Read Command Strobe. This active LO signal defines a read cycle from the codec. The
cycle may be a read from the control/PIO registers, or the cycles could be a read from
the codec’s DMA sample registers.
WR
61
76
I
Write Command Strobe. This active LO signal indicates a write cycle to the codec. The
cycle may be a write to the control/PIO registers, or the cycle could be a write to the
codec’s DMA sample registers.
CS
59
74
I
AD1845 Chip Select. The codec will not respond to any control/PIO cycle accesses
unless this active LO signal is LO. This signal is ignored during DMA transfers.
DATA7:0
3–6 &
84–87 &
I/O
Data Bus. These pins transfer data and control information between the codec and
65–68
90–93
the host.
DBEN
63
78
O
Data Bus Enable. This pin enables the external bus drivers. This signal is normally HI.
For control register/PIO cycles,
DBEN = (WR or RD) and CS
For DMA cycles,
DBEN = (WR or RD) and (PDAK or CDAK).
DBDIR
62
77
O
Data Bus Direction. This pin controls the direction of the data bus transceiver. HI
enables writes from the host bus to the AD1845; LO enables reads from the AD1845 to
the host bus. This signal is normally HI.
For control register/PIO cycles,
DBDIR =
RD and CS
For DMA cycles,
DBDIR =
RD and (PDAK or CDAK).


Số phần tương tự - AD1845JP-REEL

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Analog Devices
AD1845JSTZ AD-AD1845JSTZ Datasheet
676Kb / 40P
   Parallel-Port 16-Bit SoundPort Stereo Codec
REV. C
More results

Mô tả tương tự - AD1845JP-REEL

nhà sản xuấttên linh kiệnbảng dữ liệuGiải thích chi tiết về linh kiện
logo
Analog Devices
AD1845 AD-AD1845_15 Datasheet
1Mb / 40P
   Parallel-Port 16-Bit SoundPort Stereo Codec
REV. C
AD1848K AD-AD1848K_15 Datasheet
242Kb / 28P
   Parallel-Port 16-Bit SoundPort Stereo Codec
REV. 0
AD1848K AD-AD1848K Datasheet
320Kb / 28P
   Parallel-Port 16-Bit SoundPort Stereo Codec
REV. 0
AD1845JSTZ AD-AD1845JSTZ Datasheet
676Kb / 40P
   Parallel-Port 16-Bit SoundPort Stereo Codec
REV. C
AD1846 AD-AD1846 Datasheet
277Kb / 28P
   Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec
REV. A
AD1846 AD-AD1846_15 Datasheet
249Kb / 28P
   Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec
REV. A
AD1849K AD-AD1849K Datasheet
293Kb / 28P
   Serial-Port 16-Bit SoundPort Stereo Codec
REV. 0
AD1849 AD-AD1849_15 Datasheet
662Kb / 28P
   Serial-Port 16-Bit SoundPort Stereo Codec
REV. A
AD1847 AD-AD1847 Datasheet
311Kb / 28P
   Serial-Port 16-Bit SoundPort Stereo Codec
REV. B
AD1847 AD-AD1847_15 Datasheet
241Kb / 28P
   Serial-Port 16-Bit SoundPort Stereo Codec
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


bảng dữ liệu tải về

Go To PDF Page


Link URL




Chính sách bảo mật
ALLDATASHEET.VN
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com