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LA5693MD bảng dữ liệu(PDF) 5 Page - Sanyo Semicon Device |
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LA5693MD bảng dữ liệu(HTML) 5 Page - Sanyo Semicon Device |
5 / 7 page LA5693D, LA5693MD No.A2085-5/7 Note on application 1. For stable operation, place Cin, CO, and TR1 as near to the IC as possible. 2. When used in 0°C or below it, a capacitor of which impedance at high-frequency operation is low and has a good temperature characteristic (such as SANYO OS-CON capacitor or others) should be used to prevent oscillation. 3. Set VS to the output voltage level where the circuit will be reset using external resistors R1 and R2. VS should be set to 4V or greater due to internal circuit operation. 4. CCK must be inserted to cut the high range element of clock noise to prevent it from becoming a reset output noise. 5. For Ct, a capacitor which less varies the capacitance according to the temperature should be used. Timing Chart Vhys VCC 0 5V VS 4V 2V VO Ct RES(1) RES(2) CK 0 0 0 0 0 td td tCKW tWD tWR Application of power Instantaneous drop CPU abnormality Microcomputer operation start Digital output at I/O port of microcomputer Note : Edge-triggered at the point indicated by the arrow of CK signal. |
Số phần tương tự - LA5693MD |
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Mô tả tương tự - LA5693MD |
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