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STUSBCD01B bảng dữ liệu(PDF) 4 Page - STMicroelectronics |
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STUSBCD01B bảng dữ liệu(HTML) 4 Page - STMicroelectronics |
4 / 19 page Pin configuration STUSBCD01B 4/19 2 Pin configuration Figure 2. Bump configuration (top through view) Table 2. Pin description Bump name Symbol Type Description C3 VBAT PWR Analog supply voltage input (2.2 V - 4.5 V) C2 GND PWR Ground reference A3 VIO PWR Digital interface supply voltage (1.6 V - 2.8 V) B4 DP AI/O Connected to USB D+ Data line A4 DM AI/O Connected to USB D- Data line B2 DETECT O Hardware detection pin (open drain). 300 k Ω internal pull-down resistor. VBAT referred. A2 SHUTDOWN I Standby mode selection pin. Active HIGH. Terminates the detection and resets the device. A1 /OE I Output enable for DETECT output. Active LOW. B1 STATUS/ METHOD AI/O SW detection output: High when Charger detected. Pulled high or low through internal weak pull-up to 1V8V and weak pull-down. Detection method selection input: low for dedicated method, high for current sink method. B3 DEFAULT METHOD AI Hardware selection for detection method. Active only if VIO is not present. Dedicated method is selected if driven low, current sink method if driven high. VBAT referred. Do not leave floating to avoid increased power consumption. C4 VBUS AI VBUS voltage comparator input. Triggers the charger detection. 6V limited voltage when 10 V are applied externally. C1 1V8V O Regulator output voltage. Bypass capacitor not required. |
Số phần tương tự - STUSBCD01B |
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Mô tả tương tự - STUSBCD01B |
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