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Giải thích chi tiết về linh kiện  Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs
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© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 11
1
Publication Order Number:
MC74HCT273A/D
MC74HCT273A
Octal D Flip-Flop with
Common Clock and Reset
with LSTTL-Compatible
Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT273A may be used as a level converter for
interfacing TTL or NMOS outputs to High−Speed CMOS inputs.
The HCT273A is identical in pinout to the LS273.
This device consists of eight D flip−flops with common Clock and
Reset inputs. Each flip−flop is loaded with a low−to−high transition of
the Clock input. Reset is asynchronous and active low.
Features
Output Drive Capability: 10 LSTTL Loads
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 4.5 V to 5.5 V
Low Input Current: 1.0 μA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
Chip Complexity: 284 FETs or 71 Equivalent Gates
These Devices are Pb−Free and are RoHS Compliant
Figure 1. Logic Diagram
DATA
INPUTS
D0
11
CLOCK
D1
D2
D3
D4
D5
D6
D7
18
17
14
13
8
7
4
3
1
RESET
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
16
15
12
9
6
5
2
PIN 20 = VCC
PIN 10 = GND
NONINVERTING
OUTPUTS
PIN ASSIGNMENT
Q2
D1
D0
Q0
RESET
GND
Q3
D3
D2
Q1
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Q6
D6
D7
Q7
VCC
CLOCK
Q4
D4
D5
Q5
http://onsemi.com
SOIC−20W
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
1
1
PDIP−20
N SUFFIX
CASE 738
1
FUNCTION TABLE
Inputs
Output
Reset Clock
D
Q
LX
X
L
HH
H
HL
L
H
L
X
No Change
H
X
No Change
X = Don’t Care
Z = High Impedance
See detailed ordering, shipping information, and marking
information in the package dimensions section on page 5 of
this data sheet.
ORDERING INFORMATION


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