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SN74AHC573-Q1 bảng dữ liệu(PDF) 1 Page - Texas Instruments

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SN74AHC573-Q1 bảng dữ liệu(HTML) 1 Page - Texas Instruments

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1
FEATURES
PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
DESCRIPTION
SN74AHC573-Q1
www.ti.com.................................................................................................................................................. SCLS697A – DECEMBER 2005 – REVISED APRIL 2008
OCTAL TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
• Qualified for Automotive Applications
• Operating Range 2-V to 5.5-V V
CC
• 3-State Outputs Directly Drive Bus Lines
The SN74AHC573 is an octal transparent D-type latch designed for 2-V to 5.5-V VCC operation.
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40
°C to 125°C
TSSOP – PW
Reel of 2000
SN74AHC573QPWRQ1
HA573Q
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
FUNCTION TABLE
(EACH LATCH)
INPUTS
OUTPUT
Q
OE
LE
D
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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