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CALVC164245MDGGREP bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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CALVC164245MDGGREP bảng dữ liệu(HTML) 3 Page - Texas Instruments |
3 / 19 page www.ti.com To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE 1 47 24 36 48 2 25 13 Pin numbers shown are for the DGG and DL packages. Absolute Maximum Ratings (1) SN74ALVC164245-EP 16-BIT 2.5-V TO 3.3-V/3.3-V TO 5-V LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS SCAS774A – JUNE 2004 – REVISED SEPTEMBER 2005 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range for V CCB at 5 V and VCCA at 3.3 V (unless otherwise noted) MIN MAX UNIT VCCA –0.5 4.6 Supply voltage range V VCCB –0.5 6 Except I/O ports(2) –0.5 6 VI Input voltage range I/O port A(3) –0.5 VCCA + 0.5 V I/O port B(2) –0.5 VCCB + 0.5 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through each VCC or GND ±100 mA DGG package 70 θ JA Package thermal impedance(4) DL package 63 °C/W GQL/ZQL package 42 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) This value is limited to 6 V maximum. (3) This value is limited to 4.6 V maximum. (4) The package thermal impedance is calculated in accordance with JESD 51-7. 3 |
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