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BU21072MUV-E2 bảng dữ liệu(PDF) 8 Page - Rohm |
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BU21072MUV-E2 bảng dữ liệu(HTML) 8 Page - Rohm |
8 / 17 page 8/14 Datasheet Datasheet BU21072MUV / BU21078MUV TSZ02201-0Y2Y0FZ00020-1-2 © 2012 ROHM Co., Ltd. All rights reserved. 12.Mar.2012 Rev.001 www.rohm.com TSZ22111・15・001 ●Power on sequence Power supply pin is VDD only. AVDD and DVDD are supplied by each LDO included BU21072/78MUV, so that have no priority about power on sequence. When VDD reaches to the effective voltage, power-on-reset which initializes the digital block is released. Power-On-Reset monitoring VDD, so it should be set to proper value of decoupling capacitor and VDD rise time, so as to rise to the proper voltage (DVDD→VDD). When power-on-reset is released, MPU starts initial sequence. Inform by the INT port to the host that the initialization has been completed. After verify that the initialization has completed, the host will need to resend the command to the IC. In the case that WDTR is released as well, MPU starts initial sequence. If WDTR has released, all registers have been initialized. So the host will need to resend the command to the IC. VDD Power on Reset (ActiveLow) Initialize IC about 350usec Hi-Z about 200usec LED0-6 INT Interrupt of Initialization Done C1 0.1uF VDD decoupling capacitor C2 1.0uF DVDD decoupling capacitor C3 2.2uF AVDD decoupling capacitor Recommended value of external capacitors Over 100usec AVDD VDD DVDD 2.73V 1.50V 3.30V Fig.13 Timing chart of power on sequence Fig.12 Arrangement of external decoupling capacitors Fig.14 Timing chart of initialization |
Số phần tương tự - BU21072MUV-E2 |
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Mô tả tương tự - BU21072MUV-E2 |
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