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ISLA214P25 bảng dữ liệu(PDF) 11 Page - Intersil Corporation

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ISLA214P12
11
FN7982.2
June 27, 2012
LVDS OUTPUTS
Differential Output Voltage (Note 11)
VT
3mA Mode
612
mVP-P
Output Offset Voltage
VOS
3mA Mode
1120
1150
1200
mV
Output Rise Time
tR
240
ps
Output Fall Time
tF
240
ps
CMOS OUTPUTS
Voltage Output High
VOH
IOH = -500µA
OVDD - 0.3 OVDD - 0.1
V
Voltage Output Low
VOL
IOL = 1mA
0.1
0.3
V
Output Rise Time
tR
1.8
ns
Output Fall Time
tF
1.4
ns
NOTES:
10. The Tri-Level Inputs internal switching thresholds are approximately. 0.43V and 1.34V. It is advised to float the inputs, tie to ground or AVDD
depending on desired function.
11. The voltage is expressed in peak-to-peak differential swing. The peak-to-peak singled-ended swing is 1/2 of the differential swing.
Digital Specifications Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
CONDITIONS
MIN
(Note 5)
TYP
MAX
(Note 5) UNITS
Timing Diagrams
FIGURE 1A. LVDS DDR
CLKN
CLKP
INP
INN
tA
CLKOUTN
CLKOUTP
tCPD
D[12/10/8/6/4/2/0]N
D[12/10/8/6/4/2/0]P
LATENCY = L CYCLES
tDC
tPD
ODD
N-L
EVEN
N-L
ODD
N-L+1
EVEN
N-L+1
EVEN
N-1
ODD
N
EVEN
N


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