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SM320VC5507PGESEP bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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SM320VC5507PGESEP bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 108 page  SM320VC5507-EP www.ti.com SPRS613 – SEPTEMBER 2009 5.2.1 Recommended Operating Conditions for CVDD = 1.2 V (108 MHz) ..................................... 59 5.2.2 Recommended Operating Conditions for CVDD = 1.35 V (144 MHz) .................................... 60 5.2.3 Recommended Operating Conditions for CVDD = 1.6 V (200 MHz) ..................................... 61 5.3 ELECTRICAL CHARACTERISTICS .................................................................................... 62 5.3.1 Electrical Characteristics Over Recommended Operating Case Temperature Range for CVDD = 1.2 V (108 MHz) (Unless Otherwise Noted) ................................................................ 62 5.3.2 Electrical Characteristics Over Recommended Operating Case Temperature Range for CVDD = 1.35 V (144 MHz) (Unless Otherwise Noted) ............................................................... 63 5.3.3 Electrical Characteristics Over Recommended Operating Case Temperature Range for CVDD = 1.6 V (200 MHz) (Unless Otherwise Noted) ................................................................ 64 5.4 ESD Performance ......................................................................................................... 65 5.5 Timing Parameter Symbology ........................................................................................... 65 5.6 Clock Options .............................................................................................................. 66 5.6.1 Internal System Oscillator With External Crystal ........................................................... 66 5.6.2 Layout Considerations ......................................................................................... 66 5.6.3 Clock Generation in Bypass Mode (DPLL Disabled) ...................................................... 67 5.6.4 Clock Generation in Lock Mode (DPLL Synthesis Enabled) .............................................. 68 5.6.5 Real-Time Clock Oscillator With External Crystal .......................................................... 69 5.7 Memory Interface Timings ................................................................................................ 70 5.7.1 Asynchronous Memory Timings .............................................................................. 70 5.7.2 Synchronous DRAM (SDRAM) Timings ..................................................................... 72 5.8 Reset Timings .............................................................................................................. 79 5.8.1 Power-Up Reset (On-Chip Oscillator Active) ............................................................... 79 5.8.2 Power-Up Reset (On-Chip Oscillator Inactive) ............................................................. 80 5.8.3 Warm Reset ..................................................................................................... 80 5.9 External Interrupt Timings ................................................................................................ 81 5.10 Wake-Up From IDLE ...................................................................................................... 82 5.11 XF Timings ................................................................................................................. 82 5.12 General-Purpose Input/Output (GPIOx) Timings ...................................................................... 83 5.13 TIN/TOUT Timings (Timer0 Only) ....................................................................................... 84 5.14 Multichannel Buffered Serial Port (McBSP) Timings ................................................................. 85 5.14.1 McBSP0 Timings ............................................................................................... 85 5.14.2 McBSP1 and McBSP2 Timings ............................................................................... 86 5.14.3 McBSP as SPI Master or Slave Timings .................................................................... 89 5.14.4 McBSP General-Purpose I/O Timings ....................................................................... 94 5.15 Enhanced Host-Port Interface (EHPI) Timings ........................................................................ 95 5.16 I 2C Timings ................................................................................................................ 101 5.17 Universal Serial Bus (USB) Timings ................................................................................... 103 5.18 ADC Timings .............................................................................................................. 104 6 Mechanical Data .............................................................................................................. 105 6.1 Package Thermal Resistance Characteristics ....................................................................... 105 6.2 Packaging Information ................................................................................................... 105 Copyright © 2009, Texas Instruments Incorporated Contents 3 |
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