 |
công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
|
công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
SM320VC5507-EP bảng dữ liệu(PDF) 9 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
SM320VC5507-EP bảng dữ liệu(HTML) 9 Page - Texas Instruments |
|
|
9 / 108 page  SM320VC5507-EP www.ti.com SPRS613 – SEPTEMBER 2009 Fixed-Point Digital Signal Processor Check for Samples: SM320VC5507-EP 1 Features 1 • High-Performance, Low-Power, Fixed-Point • On-Chip Peripherals SMS320C5507 Digital Signal Processor – Two 20-Bit Timers – 9.26-, 6.95-, 5-ns Instruction Cycle Time – Watchdog Timer – 108-, 144-, 200-MHz Clock Rate – Six-Channel Direct Memory Access (DMA) – One/Two Instruction(s) Executed per Cycle Controller – Dual Multipliers (Up to 400 Million – Three Multichannel Buffered Serial Ports Multiply-Accumulates per Second (MMACS)) (McBSPs) – Two Arithmetic/Logic Units (ALUs) – Programmable Phase-Locked Loop Clock Generator – Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses – Seven (LQFP) or Eight (BGA) General- Purpose I/O (GPIO) Pins and a General- • 64K x 16-Bit On-Chip RAM, Composed of: Purpose Output Pin (XF) – 64K Bytes of Dual-Access RAM (DARAM) 8 – USB Full-Speed (12 Mbps) Slave Port Blocks of 4K x 16-Bit Supporting Bulk, Interrupt and Isochronous – 64K Bytes of Single-Access RAM (SARAM) 8 Transfers Blocks of 4K x 16-Bit – Inter-Integrated Circuit (I2C) Multi-Master and • 64K Bytes of One-Wait-State On-Chip ROM Slave Interface (32K x 16-Bit) – Real-Time Clock (RTC) With Crystal Input, • 8M x 16-Bit Maximum Addressable External Separate Clock Domain, Separate Power Memory Space (Synchronous DRAM) Supply • 16-Bit External Parallel Bus Memory – 4-Channel (BGA) or 2-Channel (LQFP) 10-Bit Supporting Either: Successive Approximation A/D – External Memory Interface (EMIF) With GPIO • IEEE Std 1149.1(1) (JTAG) Boundary Scan Logic Capabilities and Glueless Interface to: • Packages: • Asynchronous Static RAM (SRAM) – 144-Terminal Low-Profile Quad Flatpack • Asynchronous EPROM (LQFP) (PGE Suffix) • Synchronous DRAM (SDRAM) • 1.2-V Core (108 MHz), 2.7-V – 3.6-V I/Os – 16-Bit Parallel Enhanced Host-Port Interface • 1.35-V Core (144 MHz), 2.7-V – 3.6-V I/Os (EHPI) With GPIO Capabilities • 1.6-V Core (200 MHz), 2.7-V – 3.6-V I/Os • Programmable Low-Power Control of Six Device Functional Domains (1) IEEE Standard 1149.1-1990 Standard-Test-Access Port and • On-Chip Scan-Based Emulation Logic Boundary Scan Architecture. 1.1 SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • Controlled Baseline • One Assembly/Test Site • One Fabrication Site • Available in Military (–55°C/125°C) Temperature Range(2) • Extended Product Life Cycle • Extended Product-Change Notification • Product Traceability (2) Additional temperature ranges are available - contact factory 1 C55x, eXpressDSP, Code Composer Studio, DSP/BIOS, RTDX, XDS510, TMS320, TMS320C5000, TMS320C55x, TMS320C55x are trademarks of Texas Instruments. Copyright © 2009, Texas Instruments Incorporated Features 9 |
Số phần tương tự - SM320VC5507-EP |
|
Mô tả tương tự - SM320VC5507-EP |
|
|
Link URL |
| Chính sách bảo mật |
| ALLDATASHEET.VN |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Vietnamese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
