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TL1591CPSLE bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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TL1591CPSLE bảng dữ liệu(HTML) 3 Page - Texas Instruments |
3 / 11 page TL1591 SAMPLE-AND-HOLD CIRCUIT FOR CCD IMAGERS SOCS026B – SEPTEMBER 1989 – REVISED JUNE 1994 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 dynamic characteristics (see Figure 1) PARAMETER MIN TYP† MAX UNIT Acquisition time, 0.6 V to 2% 18 ns Acquisition time, 0.6 V to 1% 31 ns Hold-mode settling time 35 ns Sampling-mode bandwidth 25 MHz Sampling rate 15 MHz † All typical values are at VCC = 5 V and TA = 25°C. PARAMETER MEASUREMENT INFORMATION Sample-and-Hold Output Sample-to-Hold Transient Hold More Voltage Droop Sample-to-Hold Offset Error Aperture Uncertainty Time Sample Switch Opens Hold Command (see Note B) (see Note A) Sample-Control Pulse Sampling Switch Closes Sample Command Analog Input Signal Aperture Uncertainty (error band) Figure 1. Sample-Hold Definitions NOTES: A. Hold-mode settling time is the time from the hold command transistion until the output has settled within a specified error band around the final value. B. Acquisition time is the time required, after the closing of the sampling switch, for the hold capacitor to charge to a full-scale voltage change and then remain within a specified error band around the final value. |
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