TL16PNP200A

STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER

SLLS274A– APRIL1997 – REVISED MAY 1997

8

POST OFFICE BOX 655303

default format (continued)

The formats for the coded fields are as follows:

Table 2. I/O Block Size

CODE

BLOCK SIZE

ADDRESS BITS

DECODED

000

1 byte

15-0

001

2 bytes

15-1

010

4 bytes

15-2

011

8 bytes

15-3

100

16 bytes

15-4

101

32 bytes

15-5

110

64 bytes

15-6

Table 3. OEN0 Configuration - Mode 0

CODE

LOGICAL DEVICE

000

LD0

001

LD1

010

LD0 or LD1

Table 4. OEN0 and OEN1 Configuration - Mode 1

CODE

LOGICAL DEVICE

000

LD0

001

LD1

010

LD2

011

LD3

100

LD4

The IRQ level field is the IRQ level number (for example 0011 for IRQ3, 0100 for IRQ4, etc.), and the DMA

channel field is the DMA channel number (for example 000 for DMA channel 0, 001 for DMA channel 1, etc.).

The LDn Active bits must be set to 1 when device n is required to be active on power up or after reset, otherwise

it is cleared to 0. The mode bit must be 0 for mode 0 operation and 1 for mode 1 operation.

The DMA mapping fields tell the TL16PNP200A which ISA DMA channels are connected to the device. For

example, in Mode 0 any three ISA DMA channels can be connected to the device. When DMA channels 0, 3,

and 5 are connected to CDRQ0/CDACK0, CDRQ1/CDACK1, and CDRQ2/CDACK2, respectively, then DMA

0 mapping field will be 000, DMA 1 mapping field will be 011, and DMA 2 mapping field will be 101.