SN74SSTV32877

26-BIT REGISTERED BUFFER

WITH SSTL_2 INPUTS AND OUTPUTS

SCES378B – OCTOBER 2001 – REVISED MAY 2002

7

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VREF

VREF

VREF

VOH

VOL

Output

Control

(low-level

enabling)

Output

Waveform 1

(see Note C)

Output

Waveform 2

(see Note C)

tPZL

tPZH

tPLZ

tPHZ

VIL

VOL + 0.15 V

VOH – 0.15 V

VTT

tw

VIH

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Input

NOTES: A. CL includes probe and jig capacitance.

B. ICC tested with clock and data inputs held at VCC or GND, and IO = 0 mA.

C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

D. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω,

input slew rate = 1 V/ns

±20% (unless otherwise noted).

E. The outputs are measured one at a time with one transition per measurement.

F. VTT = VREF = VDDQ/2

G. VIH = VREF + 310 mV (ac voltage levels) for differential inputs. VIH = VCC for LVCMOS input.

H. VIL = VREF – 310 mV (ac voltage levels) for differential inputs. VIL = GND for LVCMOS input.

I. tPLZ and tPHZ are the same as tdis.

J. tPZL and tPZH are the same as ten.

K. tPLH and tPHL are the same as tpd.

VIL

VIH

VTT

LOAD CIRCUIT

50

Ω

CL = 30 pF

(see Note A)

Test Point

VTT

From Output

Under Test

th

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing

Input

VICR

VREF

Input

VIL

VIH

VREF

VTT + 0.3 V

VTT – 0.3 V

VI(PP)

tPHL

VOH

VOL

Output

VTT

VTT

tPLH

tPHL

VIH

VIL

VOL

VOH

LVCMOS

Input

Output

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VTT

VCC/2

VI(PP)

VICR

Input

VICR

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VREF

VCC/2

VOLTAGE AND CURRENT WAVEFORMS

INPUTS ACTIVE AND INACTIVE TIMES

0 V

VCC

VCC/2

LVCMOS

RESET

Input

tact

tinact

10%

90%

ICCH

ICCL

ICC

(see

Note B)

Figure 1. Load Circuit and Voltage Waveforms