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ADM1075-2ARUZ-RL7 bảng dữ liệu(PDF) 1 Page - Analog Devices

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ADM1075-2ARUZ-RL7 bảng dữ liệu(HTML) 1 Page - Analog Devices

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−48 V Hot Swap Controller and Digital
Power Monitor with PMBus Interface
Data Sheet
ADM1075
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Constant power foldback for FET SOA protection
Precision (<1.0%) current and voltage measurement
Controls inrush and faults for negative supply voltages
Suitable for wide input range due to internal shunt regulator
25 mV/50 mV full-scale sense voltage
Fine tune current limit to allow use of standard sense resistor
Soft start inrush current limit profiling
1% accurate UVH and OV pins, 1.5% accurate UVL pin
PMBus/I2C interface for control, telemetry, and fault
recording
28-lead LFCSP and TSSOP
−40°C to 105°C junction temperature (TJ) operating range
APPLICATIONS
Telecommunication and data communication equipment
Central office switching
−48 V distributed power systems
Negative power supply control
High availability servers
PRODUCT HIGHLIGHTS
1.
Constant Power Foldback.
Maximum FET power set by a PLIM resistor divider. This
eases complexity when designing to maintain FET SOA.
2.
Adjustable Current Limit.
The current limit is adjustable via the ISET pin allowing for
the use of a standard value sense resistor.
3.
12-Bit ADC.
Accurate voltage, current, and power measurements. Also
enables calculation of energy consumption over time.
4.
PMBus/I2C Interface.
PMBus fast mode compliant interface used to read back
status and data registers and set warning and fault limits.
5.
Fault Recording.
Latched status registers provide useful debugging infor-
mation to help trace faults in high reliability systems.
6.
Built-In Soft Start.
Soft start capacitor controls inrush current profile with
di/dt control.
FUNCTIONAL BLOCK DIAGRAM
FAULT TIMER
FET POWER
FOLDBACK
CONTROL
DIGITAL
AND
PMBUS
12-BIT ADC
POWER
MULTIPLIER
POWER
ACCUMULATOR
GATE CONTROL
CURRENT LIMIT
DRAIN
RESTART
SHDN
LATCH
GPO1/ALERT1/CONV
GPO2/ALERT2
SDAO
SDAI
SCL
ADR
ADC_AUX
PWRGD
SPLYGD
UNDERVOLTAGE
AND
OVERVOLTAGE
DETECTOR
VCC AND
REFERENCE
GENERATOR
VIN
ADC_V
VCAP
UVL
UVH
SENSE+
GATE
PLIM
N-FET
RSENSE
RDROP
DC-TO-DC
CONVERTER
5V
12V
3.3V
2.8V
...etc.
GND
–48V RTN (0V)
–48V
VEE
SENSE–
ISET
TIMER
SS
VEE_G
VEE
OV
VEE
ADuM1250
SDA_ISO
SCL_ISO
CLOAD
Figure 1.


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