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MCM6706ARJ8 bảng dữ liệu(PDF) 1 Page - Motorola, Inc |
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MCM6706ARJ8 bảng dữ liệu(HTML) 1 Page - Motorola, Inc |
1 / 8 page MCM6706AR 1 MOTOROLA FAST SRAM 32K x 8 Bit Static Random Access Memory The MCM6706AR is a 262,144 bit static random access memory organized as 32,768 words of 8 bits, fabricated using high performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6706AR meets JEDEC standards and is available in a revolutionary pinout 300 mil, 32–lead surface–mount SOJ package. • Single 5.0 V ± 10% Power Supply • Fully Static — No Clock or Timing Strobes Necessary • All Inputs and Outputs Are TTL Compatible • Three State Outputs • Fast Access Times: MCM6706AR–6 = 6 ns MCM6706AR–7 = 7 ns MCM6706AR–8 = 8 ns • Center Power and I/O Pins for Reduced Noise BLOCK DIAGRAM ROW DECODER MEMORY MATRIX 512 ROWS x 64 x 8 COLUMNS INPUT DATA CONTROL COLUMN I/O COLUMN DECODER A A A A A A A A DQ0 A A A E W VCC VSS A A A A DQ7 G Order this document by MCM6706AR/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA PIN ASSIGNMENT MCM6706AR J PACKAGE 300 MIL SOJ CASE 857–02 32 31 30 29 28 27 26 25 24 23 22 21 2 3 1 5 6 4 7 9 10 8 12 13 11 14 20 15 16 19 18 17 A1 A2 A3 E A7 W A4 A5 A6 VCC A11 A9 A8 A10 DQ5 DQ6 A12 G A13 A14 VSS VCC VSS DQ1 DQ3 A0 NC NC DQ0 DQ2 DQ4 DQ7 A0 – A14 Address . . . . . . . . . . . . . . . . . . . . . . . W Write Enable . . . . . . . . . . . . . . . . . . . . . . . . . E Chip Enable . . . . . . . . . . . . . . . . . . . . . . . . . . G Output Enable . . . . . . . . . . . . . . . . . . . . . . . DQ0 – DQ7 Data Input/Output . . . . . . . . . . . . VCC + 5 V Power Supply . . . . . . . . . . . . . . . . VSS Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . NC No Connection . . . . . . . . . . . . . . . . . . . . . . PIN NAMES 5/95 © Motorola, Inc. 1995 |
Số phần tương tự - MCM6706ARJ8 |
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Mô tả tương tự - MCM6706ARJ8 |
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