MCM6227B

1

MOTOROLA FAST SRAM

1M x 1 Bit Static Random

Access Memory

The MCM6227B is a 1,048,576 bit static random–access memory organized

as 1,048,576 words of 1 bit. Static design eliminates the need for external clocks

or timing strobes while CMOS circuitry reduces power consumption and provides

for greater reliability.

The MCM6227B is each equipped with a chip enable (E) pin. This feature pro-

vides reduced system power requirements without degrading access time per-

formance.

The MCM6227B is available in 300 mil and 400 mil, 28–lead surface–mount

SOJ packages.

• Single 5 V ± 10% Power Supply

• Fast Access Times: 15/17/20/25/35 ns

• Equal Address and Chip Enable Access Times

• Input and Output are TTL Compatible

• Three–State Output

• Low Power Operation: 115/110/105/100/95 mA Maximum, Active AC

BLOCK DIAGRAM

AA

A

A

A

A

AA

A

A

A

A

A

A

A

A

A

A

MEMORY MATRIX

512 ROWS x

2048 x 1 COLUMNS

ROW

DECODER

INPUT

DATA

CONTROL

COLUMN I/O

COLUMN DECODER

Q

D

A

A

E

W

Order this document

by MCM6227B/D

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

PIN ASSIGNMENT

MCM6227B

WJ PACKAGE

400 MIL SOJ

CASE 810–03

19

18

17

16

15

28

27

26

25

24

23

22

21

20

A

A

A

A

A

A

NC

A

A

A

A

Q

W

VSS

VCC

A

A

A

A

A

NC*

A

A

A

A

D

A

10

11

12

13

14

1

2

3

4

5

6

7

8

9

A

Address Inputs

. . . . . . . . . . . . . . . . . . . .

W

Write Enable

. . . . . . . . . . . . . . . . . . . . .

E

Chip Enable

. . . . . . . . . . . . . . . . . . . . . .

D

Data Input

. . . . . . . . . . . . . . . . . . . . . . . .

Q

Data Output

. . . . . . . . . . . . . . . . . . . . .

NC

No Connection

. . . . . . . . . . . . . . . . . .

VCC

+ 5 V Power Supply

. . . . . . . . . . . . .

VSS

Ground

. . . . . . . . . . . . . . . . . . . . . . .

PIN NAMES

E

J PACKAGE

300 MIL SOJ

CASE 810B–03

*If not used for no connect, then do not ex-

ceed voltages of – 0.5 to VCC + 0.5 V.

This pin is used for manufacturing diag-

nostics.

REV 3

10/31/96