MCM6246

1

MOTOROLA FAST SRAM

512K x 8 Bit Static Random

Access Memory

The MCM6246 is a 4,194,304 bit static random access memory organized as

524,288 words of 8 bits. Static design eliminates the need for external clocks or

timing strobes, while CMOS circuitry reduces power consumption and provides

for greater reliability.

The MCM6246 is equipped with chip enable (E) and output enable (G) pins,

allowing for greater system flexibility and eliminating bus contention problems.

Either input, when high, will force the outputs into high impedance.

The MCM6246 is available in a 400 mil, 36–lead surface–mount SOJ package.

• Single 5 V ± 10% Power Supply

• Fast Access Time: 17/20/25/35 ns

• Equal Address and Chip Enable Access Time

• All Inputs and Outputs are TTL Compatible

• Three–State Outputs

• Power Operation: 205/200/185/170 mA Maximum, Active AC

BLOCK DIAGRAM

G

AA

A

A

A

A

A

A

A

MEMORY MATRIX

1024 ROWS x

4096 COLUMNS

ROW

DECODER

INPUT

DATA

CONTROL

A

A

A

A

A

A

A

A

DQ

DQ

E

W

A

A

COLUMN I/O

COLUMN DECODER

DQ

DQ

Order this document

by MCM6246/D

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

WJ PACKAGE

400 MIL SOJ

CASE 893–01

PIN ASSIGNMENT

MCM6246

A

Address Inputs

. . . . . . . . . . . . . . . . . . .

W

Write Enable

. . . . . . . . . . . . . . . . . . . .

G

Output Enable

. . . . . . . . . . . . . . . . . . .

E

Chip Enable

. . . . . . . . . . . . . . . . . . . . . .

DQ

Data Input/Output

. . . . . . . . . . . . . . .

NC

No Connection

. . . . . . . . . . . . . . . . .

VCC

+ 5 V Power Supply

. . . . . . . . . . . .

VSS

Ground

. . . . . . . . . . . . . . . . . . . . . . .

PIN NAMES

5

4

3

2

1

10

9

8

7

6

11

12

13

14

15

16

17

18

20

21

22

23

24

25

26

19

27

28

32

31

30

29

36

35

34

33

A

A

A

A

E

A

VSS

VCC

DQ

DQ

DQ

DQ

A

A

W

A

A

A

VCC

DQ

DQ

A

A

A

A

A

NC

VSS

A

A

A

G

DQ

DQ

NC

A

REV 5

6/9/97