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MCM101525 bảng dữ liệu(PDF) 6 Page - Motorola, Inc |
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MCM101525 bảng dữ liệu(HTML) 6 Page - Motorola, Inc |
6 / 8 page MCM101525 6 MOTOROLA FAST SRAM WRITE CYCLE 2 (S Controlled, See Notes 1 and 2) MCM101525–12 MCM101525–15 Parameter Symbol Min Max Min Max Unit Notes Write Cycle Time tAVAV 12 — 15 — ns 3 Address Setup Time tAVSL 1 — 1 — ns Address Valid to End of Write tAVSH 9 — 10 — ns Write Pulse Width (S) (W) tSLSH tSLWH 8 — 9 — ns Data Valid to End of Write tDVSH 8 — 9 — ns Chip Select Set–Up Time tSLWL 0 — 0 — ns Data Hold Time tSHDX 1 — 1 — ns Write Recovery Time tSHAX 1 — 1 — ns NOTES: 1. A write occurs during the overlap of S low and W low. 2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles. 3. All write cycle timings are referenced from the last valid address to the first transitioning address. WRITE CYCLE 2 (S Controlled, See Notes 1 and 2) tSLWH tSHAX tDVSH tAVSL tSLSH tAVSH DATA VALID tAVAV A (ADDRESS) W (WRITE ENABLE) S (CHIP SELECT) Q/Q (DATA OUT) D (DATA IN) tSHDX tSLWL ORDERING INFORMATION (Order by Full Part Number) MCM 101525 XX XX XX Motorola Memory Prefix Part Number Speed (12 = 12 ns, 15 = 15 ns) Package (TB = TAB) Shipping Method (Blank = Rails) Full Part Numbers — MCM101525TB12 MCM101525TB15 |
Số phần tương tự - MCM101525 |
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Mô tả tương tự - MCM101525 |
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