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4 / 20 page Pin configuration STEF05 4/20 Doc ID 019055 Rev 4 2 Pin configuration Figure 2. Pin configuration (top view) V CC Source Source Source Source Source GND dv/dt En/fault I-Limit N/C AM09867v1 Table 2. Pin description Pin n° Symbol Note 1 to 5 VOUT/Source Connected to the source of the internal power MOSFET and to the output terminal of the fuse 6 NC Not connected 7 I-Limit A resistor between this pin and the Source pin sets the overload and short-circuit current limit levels. 8 En/Fault The Enable/Fault pin is a tri-state, bi-directional interface. During normal operation the pin must be left floating, or it can be used to disable the output of the device by pulling it to ground using an open drain or open collector device. If a thermal fault occurs, the voltage on this pin goes into an intermediate state to signal a monitor circuit that the device is in thermal shutdown. It can be connected to another device of this family to cause a simultaneous shutdown during thermal events. 9dv/dt The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. The internal capacitor allows a ramp-up time of around 1 ms. An external capacitor can be added to this pin to increase the ramp time. If an additional capacitor is not required, this pin should be left open. 10 GND Ground pin 11 VCC Exposed pad. Positive input voltage must be connected to VCC. |
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