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74LVC1G00GW bảng dữ liệu(PDF) 10 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Single 2-input NAND gate
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74LVC1G00
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 9 — 7 December 2011
10 of 17
NXP Semiconductors
74LVC1G00
Single 2-input NAND gate
Fig 11. Package outline SOT886 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT886
MO-252
SOT886
04-07-15
04-07-22
DIMENSIONS (mm are the original dimensions)
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0
1
2 mm
scale
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
0.25
0.17
1.5
1.4
0.35
0.27
A1
max
b
E
1.05
0.95
D
ee1
L
0.40
0.32
L1
0.5
0.6
A(1)
max
0.5
0.04
1
6
2
5
3
4
6
×
(2)
4
×
(2)
A


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