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MC88915 bảng dữ liệu(PDF) 8 Page - Motorola, Inc

tên linh kiện MC88915
Giải thích chi tiết về linh kiện  Low Skew CMOS PLL Clock Driver
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nhà sản xuất  MOTOROLA [Motorola, Inc]
Trang chủ  http://www.freescale.com
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MC88915 bảng dữ liệu(HTML) 8 Page - Motorola, Inc

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MC88915
MOTOROLA
TIMING SOLUTIONS
BR1333 — Rev 6
8
Q/2 OUTPUT
tCYCLE SYNC INPUT
The MC88915 aligns rising edges of the FEEDBACK input and SYNC input, therefore the SYNC input does
not require a 50% duty cycle.
All skew specs are measured between the VCC/2 crossing point of the appropriate output edges.All skews
are specified as ‘windows’, not as a
± deviation around a center point.
If a “Q” output is connected to the FEEDBACK input (this situation is not shown), the “Q” output frequency
would match the SYNC input frequency, the 2X_Q output would run at twice the SYNC frequency, and the
Q/2 output would run at half the SYNC frequency.
Timing Notes:
(These waveforms represent the hook–up configuration of Figure 5a on page 9)
FEEDBACK
INPUT
SYNC INPUT
(SYNC[1] or
SYNC[0])
Figure 4. Output / Input Switching Waveforms and Timing Diagrams
tCYCLE “Q” OUTPUTS
2X_Q OUTPUT
Q5 OUTPUT
tSKEWf
tSKEWf
tSKEWR
tSKEWr
tSKEWALL
Q0 – Q4
OUTPUTS
PD
t


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