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AM1808BZCEA3 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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AM1808BZCEA3 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 265 page  AM1808 SPRS653B – FEBRUARY 2010 – REVISED APRIL 2011 www.ti.com • USB 1.1 OHCI (Host) With Integrated PHY – Supports Multiple Interfaces with START, (USB1) ENABLE and WAIT Controls • USB 2.0 OTG Port With Integrated PHY (USB0) • Serial ATA (SATA) Controller: – USB 2.0 High-/Full-Speed Client – Supports SATA I (1.5 Gbps) and SATA II (3.0 Gbps) – USB 2.0 High-/Full-/Low-Speed Host – Supports all SATA Power Management – End Point 0 (Control) Features – End Points 1,2,3,4 (Control, Bulk, Interrupt or – Hardware-Assisted Native Command ISOC) Rx and Tx Queueing (NCQ) for up to 32 Entries • One Multichannel Audio Serial Port: – Supports Port Multiplier and – Transmit/Receive Clocks Command-Based Switching – Two Clock Zones and 16 Serial Data Pins • Real-Time Clock With 32 KHz Oscillator and – Supports TDM, I2S, and Similar Formats Separate Power Rail – DIT-Capable • Three 64-Bit General-Purpose Timers (Each – FIFO buffers for Transmit and Receive configurable as Two 32-Bit Timers) • Two Multichannel Buffered Serial Ports: • One 64-bit General-Purpose/Watchdog Timer – Transmit/Receive Clocks (Configurable as Two 32-bit General-Purpose – Supports TDM, I2S, and Similar Formats Timers) – AC97 Audio Codec Interface • Two Enhanced Pulse Width Modulators (eHRPWM): – Telecom Interfaces (ST-Bus, H100) – Dedicated 16-Bit Time-Base Counter With – 128-channel TDM Period And Frequency Control – FIFO buffers for Transmit and Receive – 6 Single Edge, 6 Dual Edge Symmetric or 3 • 10/100 Mb/s Ethernet MAC (EMAC): Dual Edge Asymmetric Outputs – IEEE 802.3 Compliant – Dead-Band Generation – MII Media Independent Interface – PWM Chopping by High-Frequency Carrier – RMII Reduced Media Independent Interface – Trip Zone Input – Management Data I/O (MDIO) Module • Three 32-Bit Enhanced Capture Modules • Video Port Interface (VPIF): (eCAP): – Two 8-bit SD (BT.656), Single 16-bit or Single – Configurable as 3 Capture Inputs or 3 Raw (8-/10-/12-bit) Video Capture Channels Auxiliary Pulse Width Modulator (APWM) – Two 8-bit SD (BT.656), Single 16-bit Video outputs Display Channels – Single Shot Capture of up to Four Event • Universal Parallel Port (uPP): Time-Stamps – High-Speed Parallel Interface to FPGAs and • 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) Data Converters [ZCE Suffix], 0.65-mm Ball Pitch – Data Width on Each of Two Channels is 8- to • 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) 16-bit Inclusive [ZWT Suffix], 0.80-mm Ball Pitch – Single Data Rate or Dual Data Rate Transfers • Commercial or Extended Temperature 2 AM1808 ARM Microprocessor Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1808 |
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Mô tả tương tự - AM1808BZCEA3 |
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