công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
ADS5263_1110 bảng dữ liệu(PDF) 6 Page - Texas Instruments |
|
ADS5263_1110 bảng dữ liệu(HTML) 6 Page - Texas Instruments |
6 / 75 page ADS5263 SLAS760B – MAY 2011 – REVISED OCTOBER 2011 www.ti.com PIN FUNCTIONS (continued) PIN NO. OF PIN NAME DESCRIPTION PINS TYPE NO. IN4B_P, IN4B_M Differential analog input for channel 4, 14 bit ADC I 44, 45 2 INT/EXT Internal/external reference mode select input I 56 1 Logic HIGH –internal reference Logic LOW – external reference ISET Bias pin – 56.2 kΩ resistor (1% tolerance value) to ground I 51 1 LCLKM LVDS bit clock (8X) – negative output O 26 1 LCLKP LVDS bit clock (8X) – positive output O 25 1 LGND Digital ground I 12, 14, 36 3 LVDD Digital and I/O power supply, 1.8 V I 35 1 OUT1P, OUT1M Wire 1, channel 1 LVDS differential output O 15, 16 2 OUT2P, OUT2M Wire 2, channel 1 LVDS differential output O 17, 18 2 OUT3P, OUT3M Wire 1, channel 2, LVDS differential output O 19, 20 2 OUT4P, OUT4M Wire 2, channel 2 LVDS differential output O 21, 22 2 OUT5P, OUT5M Wire 1, channel 3 LVDS differential output O 27, 28 2 OUT6P, OUT6M Wire 2, channel 3 LVDS differential output O 29, 30 2 OUT7P, OUT7M Wire 1, channel 4 LVDS differential output O 31, 32 2 OUT8P, OUT8M Wire 2, channel 4 LVDS differential output O 33, 34 2 PD Power-down input I 13 1 REFB Negative-reference input/output IO 54 1 REFT Positive-reference input/output IO 55 1 RESET Serial interface RESET input, active LOW. I 64 1 When using the serial interface mode, the user must initialize internal registers through hardware RESET by applying a low-going pulse on this pin or by using software reset option. See the Serial Interface section. SCLK Serial interface clock input. The pin has an internal 300-k Ω pulldown resistor. I 63 1 SDATA Serial interface data input. The pin has an internal 300-k Ω pulldown resistor. I 62 1 SDOUT Serial register readout O 52 1 This pin is in the high-impedance state after reset. When the <READOUT> bit is set, the SDOUT pin becomes active. This is a CMOS digital output running from the AVDD supply. SYNC Input signal to synchronize channels and chips when used with reduced output data rates I 49 1 Alternate function: Clamp signal input (14-bit ADC mode only) VCM Outputs the common-mode voltage (1.5 V) that can be used externally to bias the analog input O 53 1 pins. 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s) :ADS5263 |
Số phần tương tự - ADS5263_1110 |
|
Mô tả tương tự - ADS5263_1110 |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |