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GS2975ACNTE3Z bảng dữ liệu(PDF) 6 Page - Gennum Corporation |
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GS2975ACNTE3Z bảng dữ liệu(HTML) 6 Page - Gennum Corporation |
6 / 27 page GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 6 of 27 24, 25, 26 SS[0:2] Bi-directional When AUTO/MAN is HIGH, SS[0:2] are outputs, displaying the data rate to which the PLL has locked. When AUTO/MAN is LOW, SS[0:2] are inputs, forcing the PLL to lock only to a selected data rate . 27 NC No Connect Not connected internally. 28 LOCKED Output Lock Detect. This pin is set HIGH by the device when the PLL is locked. 29 LOS Output Loss of Signal. Set HIGH when there are no transitions on the active DDI[3:0] input. 30 VCC_DIG Power Most positive power supply connection for the internal glue logic. Connect to 3.3V. 31 VEE_DIG Power Most negative power supply connection for the internal glue logic. Connect to GND. 33 SD/HD Output This signal will be set LOW by the device when the reclocker has locked to 2.97Gb/s (2.967Gb/s) or 1.485Gb/s (1.4835Gb/s), or when a non-SMPTE standard is applied (i.e. the device is not locked). It will be set HIGH when the reclocker has locked to 270Mbps. 34 KBB Analog Input Controls the loop bandwidth of the PLL. 35 RCO_MUTE Power Serial clock or secondary data output mute. Assert LOW for reduced power consumption, see 2.2 DC Electrical Characteristics. When RCO_MUTE = LOW, the RCO/DDO1 output is powered down. When RCO_MUTE = HIGH, the RCO/DDO1 output is active. NOTE: This is not a logic input pin. Table 1-1: Pin Descriptions (Continued) Pin Number Name Type Description SS2 SS1 SS0 DATA RATE SELECTED/FORCED (Mb/s) 01 0 270 1 0 1 1483.5/1485 1 1 0 2967/2970 |
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