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GS1504-CKDE3 bảng dữ liệu(PDF) 9 Page - Gennum Corporation |
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GS1504-CKDE3 bảng dữ liệu(HTML) 9 Page - Gennum Corporation |
9 / 13 page 522 - 05 - 05 9 of 13 APPLICATION INFORMATION PCB LAYOUT Special attention must be paid to component layout when designing serial digital interfaces for HDTV. Figures 23 through 27 show the artwork for a four layer printed circuit evaluation board for the GS1504. The schematic is shown in Figure 22. An FR-4 dielectric can be used, however, controlled impedance transmission lines are required for PCB traces longer than approximately 1cm. Note the following PCB artwork features used to optimize performance: • PCB trace width for HD rate signals is closely matched to SMT component width to minimize reflections due to change in trace impedance. • The PCB ground plane is removed under the GS1504 input components to minimize parasitic capacitance. • The PCB ground plane is removed under the GS1504 output components to minimize parasitic capacitance. • High speed traces are curved to minimize impedance changes. A picture of the GS1504 PCB assembly is shown in Figure 28. GS1504 EVALUATION BOARD Fig. 22 GS1504 Application Schematic CLI VCC VEE SDI SDI VEE MCLADJ NC CD/MUTE VCC VEE SDO SDO VEE NC NC VCC VCC 10n 4.7µ 4.7µ VCC 10n VCC 10n 2k 10k 15k 10n 47p 47p 75 75 10nH 37 R1 L4 R4 J1 R2 C8 C7 C2 C1 C6 C5 J4 R5 R3 R6 TP1 J5 C3 C4 J2 J3 1µ C10 100n C9 1n C11 C1, C2 must be tantalum capacitors. + + 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 All resistors in ohms, all capacitors in farads, unless otherwise shown. |
Số phần tương tự - GS1504-CKDE3 |
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Mô tả tương tự - GS1504-CKDE3 |
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