MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

1

REV 7

2/97

Octal D Flip-Flop with

Common Clock and Reset

with LSTTL-Compatible Inputs

High–Performance Silicon–Gate CMOS

The MC74HCT273A may be used as a level converter for interfacing TTL

or NMOS outputs to High–Speed CMOS inputs.

The HCT273A is identical in pinout to the LS273.

This device consists of eight D flip–flops with common Clock and Reset

inputs. Each flip–flop is loaded with a low–to–high transition of the Clock

input. Reset is asynchronous and active low.

• Output Drive Capability: 10 LSTTL Loads

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 284 FETs or 71 Equivalent Gates

LOGIC DIAGRAM

DATA

INPUTS

D0

11

CLOCK

D1

D2

D3

D4

D5

D6

D7

18

17

14

13

8

7

4

3

1

RESET

19

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

16

15

12

9

6

5

2

PIN 20 = VCC

PIN 10 = GND

NONINVERTING

OUTPUTS

MC74HCT273A

PIN ASSIGNMENT

Q2

D1

D0

Q0

RESET

GND

Q3

D3

D2

Q1

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

Q6

D6

D7

Q7

VCC

CLOCK

Q4

D4

D5

Q5

FUNCTION TABLE

Inputs

Output

Reset

Clock

D

Q

LX

X

L

HH

H

HL

L

H

L

X

No Change

H

X

No Change

X = Don’t Care

Z = High Impedance

DW SUFFIX

SOIC PACKAGE

CASE 751D–04

N SUFFIX

PLASTIC PACKAGE

CASE 738–03

ORDERING INFORMATION

MC74HCTXXXAN

MC74HCTXXXADW

Plastic

SOIC

1

20

1

20