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BU21024FV-M bảng dữ liệu(PDF) 4 Page - Rohm |
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BU21024FV-M bảng dữ liệu(HTML) 4 Page - Rohm |
4 / 18 page Technical Note 4/17 www.rohm.com 2011.08 - Rev.A © 2011 ROHM Co., Ltd. All rights reserved. BU21023GUL,BU21023MUV,BU21024FV-M ● HOST-I/F mode (2-wire serial) (SCL=SCL_SCK, SDA=SDA_SI) The 2-wire serial mode presents an I 2C like interface for all practical purposes, but it is not a complete implementation conforming to the I 2C specification. The BU21023MUV/ BU21023GUL / BU21024FV-M devices can co-exist with other I2C devices on the same bus. The slave address for 2-wire serial communication is 5Ch or 5Dh. This is determined by the SEL_CSB pin. SEL_CSB = “L” : Slave address = 5Ch SEL_CSB = “H” : Slave address = 5Dh Parameter Symbol Limits Unit Condition Min. Typ. Max. SCL clock frequency fSCL 0 - 400 kHz START condition hold time tHD:STA 0.6 - - µs SCL “L” tLOW 1.3 - - µs SCL “H” tHIGH 0.6 - - µs Data hold time tHD:DAT 0.1 - - µs Data setup time tSU:DAT 0.1 - - µs STOP condition setup time tSU:STO 0.6 - - µs ・ Write protocol S SLAVE ADDRESS W A REGISTER ADDRESS A WRITE DATA AP 7bit = 5Ch or 5Dh 8bit 8bit ・ Read protocol S SLAVE ADDRESS W A REGISTER ADDRESS A S SLAVE ADDRESS R A READ DATA N P 7bit = 5Ch or 5Dh 8bit 7bit = 5Ch or 5Dh 8bit from master to slave S = START condition from slave to master P = STOP condition R = data direction READ (SDA HIGH) W = data direction WRITE (SDA LOW) A = acknowledge (SDA LOW) N = not acknowledge (SDA HIGH) SDA SCL Address ACK ACK ACK Data Data tHD;STA tSU;STO tSU;DAT tHD;DAT SDA SCL |
Số phần tương tự - BU21024FV-M |
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Mô tả tương tự - BU21024FV-M |
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