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ISL28256FUZ-T7 bảng dữ liệu(PDF) 9 Page - Intersil Corporation

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ISL28256FUZ-T7 bảng dữ liệu(HTML) 9 Page - Intersil Corporation

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9
FN6154.5
December 16, 2008
Applications Information
Introduction
The ISL28156 is a single BiMOS rail-to-rail input, output
(RRIO) operational amplifier with an enable feature. The
ISL28256 is a dual version without the enable feature. Both
devices are designed to operate from single supply (2.4V to
5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only
39µA of supply current per amplifier. This combination of low
power and precision performance makes this device suitable
for a variety of low power applications including battery
powered systems.
Rail-to-Rail Input/Output
These devices feature bi-polar inputs, which have an input
common mode range that extends up to 0.5V beyond the V+
rail, and to within 10mV of the V- rail. The CMOS outputs
typically swing to within about 4mV of the supply rails with a
100k
Ω load. The NMOS sinks current to swing the output in
the negative direction. The PMOS sources current to swing the
output in the positive direction.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure
the input currents never exceed 5mA (Figure 35).
Enable/Disable Feature
The ISL28156 offers an EN pin that disables the device when
pulled up to at least 2.0V. In the disabled state (output in a
high impedance state), the part consumes typically 10µA. By
disabling the part, multiple ISL28156 parts can be connected
together as a MUX. In this configuration, the outputs are tied
together in parallel and a channel can be selected by the EN
Pin Descriptions
ISL28156
(6 Ld SOT-23)
ISL28156
(8 Ld SOIC)
ISL28256
(8 Ld MSOP)
PIN NAME
FUNCTION
EQUIVALENT CIRCUIT
1, 5
NC
Not connected
42
2 (A)
6 (B)
IN-
IN-_A
IN-_B
Inverting input
Circuit 1
33
3 (A)
5 (B)
IN+
IN+_A
IN+_B
Non-inverting
input
(See Circuit 1)
2
4
4
V-
Negative supply
16
1 (A)
7 (B)
OUT
OUT_A
OUT_B
Output
Circuit 2
6
7
8
V+
Positive supply
5
8
ENABLE
Chip enable
Circuit 3
IN-
V+
V-
IN+
V+
V-
OUT
V+
V-
CE
FIGURE 35. INPUT CURRENT LIMITING
-
+
RIN
RL
VIN
VOUT
ISL28156, ISL28256


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