công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
SM320F2812KGDS150A bảng dữ liệu(PDF) 7 Page - Texas Instruments |
|
|
SM320F2812KGDS150A bảng dữ liệu(HTML) 7 Page - Texas Instruments |
7 / 155 page SM320F2812-HT www.ti.com SGUS062A – JUNE 2009 – REVISED APRIL 2010 List of Tables 2-1 Hardware Features ............................................................................................................... 14 2-2 Bare Die Information ............................................................................................................. 15 2-3 Signal Descriptions .............................................................................................................. 17 3-1 Addresses of Flash Sectors in F2812 ......................................................................................... 29 3-2 Wait States ........................................................................................................................ 30 3-3 Boot Mode Selection ............................................................................................................. 33 3-4 Peripheral Frame 0 Registers .................................................................................................. 37 3-5 Peripheral Frame 1 Registers .................................................................................................. 37 3-6 Peripheral Frame 2 Registers .................................................................................................. 38 3-7 Device Emulation Registers ..................................................................................................... 39 3-8 XINTF Configuration and Control Register Mappings ....................................................................... 41 3-9 XREVISION Register Bit Definitions ........................................................................................... 41 3-10 PIE Peripheral Interrupts ....................................................................................................... 43 3-11 PIE Configuration and Control Registers ..................................................................................... 44 3-12 External Interrupts Registers ................................................................................................... 45 3-13 PLL, Clocking, Watchdog, and Low-Power Mode Registers .............................................................. 47 3-14 PLLCR Register Bit Definitions ................................................................................................. 48 3-15 Possible PLL Configuration Modes ............................................................................................ 49 3-16 F2812 Low-Power Modes ....................................................................................................... 51 4-1 CPU-Timers 0, 1, 2 Configuration and Control Registers ................................................................... 54 4-2 Module and Signal Names for EVA and EVB ................................................................................ 55 4-3 EVA Registers ................................................................................................................... 56 4-4 ADC Registers ................................................................................................................... 64 4-5 3.3-V eCAN Transceivers for the SM320F2812 DSP ....................................................................... 66 4-6 CAN Registers Map ............................................................................................................. 68 4-7 McBSP Register Summary ...................................................................................................... 71 4-8 SCI-A Registers .................................................................................................................. 74 4-9 SCI-B Registers .................................................................................................................. 74 4-10 SPI Registers .................................................................................................................... 77 4-11 GPIO Mux Registers ............................................................................................................ 79 4-12 GPIO Data Registers ............................................................................................................ 80 6-1 Typical Current Consumption by Various Peripherals (at 150 MHz) ..................................................... 90 6-2 Recommended Low-Dropout Regulators ..................................................................................... 91 6-3 Clock Table and Nomenclature ................................................................................................. 94 6-4 Input Clock Frequency .......................................................................................................... 94 6-5 XCLKIN Timing Requirements – PLL Bypassed or Enabled .............................................................. 95 6-6 XCLKIN Timing Requirements – PLL Disabled .............................................................................. 95 6-7 Possible PLL Configuration Modes ........................................................................................... 95 6-8 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ....................................................... 95 6-9 Reset (XRS) Timing Requirements ........................................................................................... 96 6-10 IDLE Mode Switching Characteristics ....................................................................................... 100 6-11 STANDBY Mode Switching Characteristics ................................................................................ 101 6-12 HALT Mode Switching Characteristics ...................................................................................... 103 6-13 PWM Switching Characteristics .............................................................................................. 105 6-14 Timer and Capture Unit Timing Requirements ............................................................................. 105 6-15 External ADC Start-of-Conversion – EVA – Switching Characteristics ................................................. 106 Copyright © 2009–2010, Texas Instruments Incorporated List of Tables 7 |
Số phần tương tự - SM320F2812KGDS150A |
|
Mô tả tương tự - SM320F2812KGDS150A |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |