STK14C88-3

Document Number: 001-50592 Rev. *D

Page 4 of 18

Device Operation

The STK14C88-3 nvSRAM is made up of two functional

components paired in the same physical cell. These are an

SRAM memory cell and a nonvolatile QuantumTrap cell. The

SRAM memory cell operates as a standard fast static RAM.

Data in the SRAM is transferred to the nonvolatile cell (the

STORE operation) or from the nonvolatile cell to SRAM (the

RECALL operation). This unique architecture enables the

storage and recall of all cells in parallel. During the STORE and

RECALL operations, SRAM READ and WRITE operations are

inhibited. The STK14C88-3 supports unlimited reads and

writes similar to a typical SRAM. In addition, it provides

unlimited RECALL operations from the nonvolatile cells and

up to one million STORE operations.

SRAM Read

The STK14C88-3 performs a READ cycle whenever CE and

OE are LOW while WE and HSB are HIGH. The address

accessed. When the READ is initiated by an address

cycle 1). If the READ is initiated by CE or OE, the outputs are

data outputs repeatedly respond to address changes within

control input pins, and remains valid until another address

change or until CE or OE is brought HIGH, or WE or HSB is

brought LOW.

SRAM Write

A WRITE cycle is performed whenever CE and WE are LOW

and HSB is HIGH. The address inputs must be stable prior to

entering the WRITE cycle and must remain stable until either

CE or WE goes HIGH at the end of the cycle. The data on the

the end of an CE controlled WRITE. Keep OE HIGH during the

entire WRITE cycle to avoid data bus contention on common

I/O lines. If OE is left LOW, internal circuitry turns off the output

AutoStore Operation

The STK14C88-3 can be powered in one of three storage

operations:

charge is used by the chip to perform a single STORE

capacitor.

Figure 2 shows the proper connection of the storage capacitor

capacitor having a capacity of between 68 uF and 220 uF

(+20%) rated at 4.7V should be provided.

To reduce unnecessary nonvolatile stores, AutoStore and

Hardware Store operations are ignored, unless at least one

WRITE operation has taken place since the most recent

STORE or RECALL cycle. Software initiated STORE cycles

are performed regardless of whether a WRITE operation has

taken place. An optional pull-up resistor is shown connected

if an AutoStore cycle is in progress.

If the power supply drops faster than 20 us/volt before Vcc

AutoStore Inhibit Mode

page 5). This is the AutoStore Inhibit mode, where the

AutoStore function is disabled. If the STK14C88-3 is operated

throughout this data sheet. In this mode, STORE operations

are triggered through software control. It is not permissible to

change between these options “On the fly”.

Figure 2. AutoStore Mode

[+] Feedback

[+] Feedback