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ADATE318BCPZ bảng dữ liệu(PDF) 2 Page - Analog Devices

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Giải thích chi tiết về linh kiện  600 MHz Dual Integrated DCL with PPMU, VHH Drive Capability, Level Setting DACs, and On-Chip
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ADATE318
Rev. 0 | Page 2 of 80
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications....................................................................................... 1
 
General Description ......................................................................... 1
 
Revision History ............................................................................... 2
 
Functional Block Diagram .............................................................. 3
 
Specifications..................................................................................... 4
 
SPI Timing Details ..................................................................... 22
 
Absolute Maximum Ratings.......................................................... 27
 
Thermal Resistance .................................................................... 27
 
ESD Caution................................................................................ 27
 
Pin Configuration and Function Descriptions........................... 28
 
Typical Performance Characteristics ........................................... 31
 
SPI Interconnect Details ................................................................ 49
 
Use of the SPI BUSY Pin................................................................ 50
 
Reset Sequence and the RST Pin .................................................. 51
 
SPI Register Definitions and Memory Map................................ 52
 
Control Register Details................................................................. 55
 
Level Setting DACs......................................................................... 63
 
DAC Update Modes ................................................................... 63
 
DAC Transfer Functions ........................................................... 67
 
Gain and Offset Correction ...................................................... 68
 
X2 Registers.................................................................................. 68
 
Sample Calculations of m and c ............................................... 68
 
Power Supply, Grounding, and Decoupling Strategy ................ 70
 
User Information and Truth Tables ............................................. 71
 
Alarm Functions......................................................................... 72
 
PPMU External Capacitors....................................................... 72
 
Temperature Sensor ................................................................... 72
 
Default Test Conditions............................................................. 73
 
Detailed Functional Block Diagrams........................................... 74
 
Outline Dimensions ....................................................................... 80
 
Ordering Guide .......................................................................... 80
 
REVISION HISTORY
4/11—Revision 0: Initial Version


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