STK672-050

No. 5228—6/11

2-3. RETURN (It forcibly returns the phase to the origin of current excitation phase.)

1. Pin format

sCMOS Schmitt configuration containing pull-up resistor

(20k

Ω, typical value)

2. Noise eliminating circuit is contained.

3. Function

sForces to moves to the origin of current excitation phase by

setting the RETURN signal to high state.

2-4. ENABLE(ON/OFF control of excitation drive output A, A, B, and B and selection of

operation/hold state in hybrid-IC)

1. Pin format

sCMOS Schmitt configuration containing pull-up resistor

(20 k

Ω, typical value)

2. Function

a. When the ENABLE signal is set to a high state or it is opened.

It is usually placed in the operation status.

b. When the ENABLE signal is set to a low state

The hybrid-IC is placed into the hold state, forcing the excitation drive output to be turned

off.

At this time, the system clock of the HC stops, the H-IC is not affected if the input pin other

than the reset input changes.

2-5. M1, M2, and M3 (Selection of excitation modes and clock input edge timing)

1. Pin format

sCMOS Schmitt configuration containing the pull-up resistor

(20 k

Ω typical value)

2. Functions

3. Valid timing of mode setting

sThe mode must not be changed within 5

µs from the rising edge and

falling edge of the clock.

M2

0

0

1

1

Phase switching clock edge timing

01

0

1

1

2 phase excitation

1-2 phase excitation

W1-2 phase

excitation

2W1-2 phase

excitation

Only the rising edge

0

1-2 phase excitation

W1-2 phase

excitation

2W1-2 phase

excitation

4W1-2 phase

excitation

Rising edge and falling edge

M1

M3