công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
LC07424LP bảng dữ liệu(PDF) 9 Page - Sanyo Semicon Device |
|
LC07424LP bảng dữ liệu(HTML) 9 Page - Sanyo Semicon Device |
9 / 32 page LC07424LP Video characteristics at Ta=25±2°C, VDDh=VDDvh=4.8V, VDDana=VDDsp=VDDv=2.8V, VDDio=VDDdig=1.8V, VSSvh=VSSh=VSSana=VSSsp=VSSv=VSSdig=0V Unless otherwise specified, the AC input is the sine wave. Parameter Symbol Conditions min typ max unit VD_YDR YIN pin 1.0 1.2 Vp-p Input range VD_CDR CIN pin 0.7 0.9 Vp-p VD_YRin YIN pin 1 MΩ Input impedance VD_CRin CIN pin 100 kΩ Input signal: 8MHz (0.7Vp-p) -6.0 -3.0 0.0 dB Frequency characteristics (*1) VD_LPF Input signal: 20MHz (0.7Vp-p) -40 -30 dB 2nd harmonic distortion ratio 1 (*1) VD_D1 Input signal: 1MHz (0.7Vp-p) -50 -40 dB 2nd harmonic distortion ratio 2 (*1) VD_D2 Input signal: 4MHz (0.7Vp-p) -35 -30 dB Differential gain VD_DG -1 1 % Differential phase VD_DP -1 1 deg. V_S / N (*2) VD_VSNR VOUT pin -64 dBrms AM -70 dBrms C_S / N (*3) VD_CSNR PM -62 dBrms Output load resistance VD_RL Refer to Fig. 2.5.1. 140 150 Ω VD_C1L C1 Refer to Fig. 2.5.1. 15 pF Output load capacity VD_C2L C2 Refer to Fig. 2.5.1. 400 pF Group delay 1 (*4) VD_GD1 20 60 ns Group delay 2 (*5) VD_GD2 15 45 ns [VD_Y_GAIN]=[VD_C_GAIN]=22h 7.2 8.2 9.2 dB [VD_Y_GAIN]=[VD_C_GAIN]=11h 5.5 6.5 7.5 dB Gain value (*6) VD_G [VD_Y_GAIN]=[VD_C_GAIN]=00h 3.8 4.8 5.8 dB Gain step width VD_GS [VD_Y_GAIN]=22h to 00h [VD_C_GAIN]=22h to 00h 0.1 dB (*1) YIN input current, as measured at VOUT pin (0dB assumed af 100kHz) (*2) Noise Spectrum measurement Fig. 2.5.1 Video driver circuit VOUT Vsag 75Ω 1μF 75Ω C2 C1 100μF Measured at VOUT pin, 50% White input, frequency range (100k-5MHz) (*3) Measured at VOUT pin , 100% Red input, frequency range (10k-1MHz) (*4) Input: YIN pin, frequency range (100k-5MHz) Measurement: VOUT pin (*5) Input: CIN pin, frequency range (2MHz-5MHz) Measurement: VOUT pin (*6) Enter 100kHz (0.5Vp-p) to YIN pin and measure at VOUT pin. Enter 3.58MHz (0.5Vp-p) to CIN pin and measure at VOUT pin. Refer to Fig. 2.5.1. (Note here that C1=C2=0 μF) Current drain at Ta=25±2°C, VDDh=VDDvh= 4.8V, VDDana=VDDsp=VDDv=2.8V VDDio=VDDdig=1.8V, VSSvh=VSSh=VSSana=VSSsp=VSSv=VSSdig=0V Parameter Symbol Conditions min typ max unit Source current at standby IddS Total of the following pins; VDDio, VDDdig, VDDana, VDDsp, VDDv, VDDh, and VDDvh (*1) 10 100 μA 1.8V system supply current Idd18 Total of the following pins; VDDdig and VDDio (*2) 5 mA 2.8V system supply current Idd28 Total of the following pins; VDDana, VDDsp, and VDDv (*2) 13 mA 4.8V system supply current Idd48 Total of the following pins; VDDh, and VDDvh (*2) 6 mA (*1) RESET_X pin = 0V、After input of clock in the MCLK pin, measure after stopping the clock. (*2) All circuits operating (Record & Playback & VIDEO) MCLK: 12.288MHz (48kHz), Audio analog input signal: no signal, video input signal: Color bar No.A1619-9/32 |
Số phần tương tự - LC07424LP |
|
Mô tả tương tự - LC07424LP |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |